GATE EE 2023 Set 1 — Question 28
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Question
The bus admittance () matrix of a 3-bus power system is given below.
Considering that there is no shunt inductor connected to any of the buses, which of the following can NOT be true?
| 1 | 2 | 3 | |
|---|---|---|---|
| 1 | |||
| 2 | |||
| 3 |
Correct answer
(A) Line charging capacitor of finite value is present in all three lines; (C) Line charging capacitor of finite value is present in line 2-3 only and shunt capacitor of finite value is present in bus 1 only
Solution
In a bus admittance matrix the off-diagonal elements are and the diagonal elements are , where is the series admittance of line - and is the total shunt admittance at bus (half line-charging of every line at that bus plus any bus shunt).Series admittancesNet shunt admittance at each bus
- Bus 1:
- Bus 2: (capacitive)
- Bus 3: (capacitive)
- (A) Line charging in all three lines would put capacitive susceptance at bus 1 from lines 1-2 and 1-3, contradicting . Can NOT be true.
- (C) A finite shunt capacitor at bus 1 likewise contradicts . Can NOT be true.
- (D) Line charging of line 2-3 split equally as at each end, plus a shunt capacitor at bus 3, gives exactly and . Can be true.
- (B) Here line 2-3 charging must account for all of the shunt at buses 2 and 3. Bus 1 is not contradicted, so this option is accepted as possibly true; strictly, a symmetric nominal- representation would place equal halves at the two ends, whereas the matrix needs at bus 2 and at bus 3, so (B) holds only if the line's charging is allowed to be represented unequally at its two ends.
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