GATE EE 2023 Set 1 — Question 60

Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.
NAT+2 / -0HardUnsymmetrical Faults (LG, LL, LLG)Fault AnalysisPower Systems

Power Systems → Fault Analysis → Unsymmetrical Faults (LG, LL, LLG)

Last updated

Question

The two-bus power system shown in figure (i) has one alternator supplying a synchronous motor load through a Y-Δ\Delta transformer. The positive, negative and zero-sequence diagrams of the system are shown in figures (ii), (iii) and (iv), respectively. All reactances in the sequence diagrams are in p.u. For a bolted line-to-line fault (fault impedance = zero) between phases ‘b’ and ‘c’ at bus 1, neglecting all pre-fault currents, the magnitude of the fault current (from phase ‘b’ to ‘c’) in p.u. is _____________ (Round off to 2 decimal places).
📷 Figure: Single-line diagram and sequence networks of a power system

Your answer

Enter a number. Decimals, negative values and scientific notation are accepted.

The solution stays hidden until you check.

Continue learning with Success Tracker

A step still unclear? Work through it with support

Use Success Tracker to ask about the reasoning, then try another GATE EE question to check your understanding.

AI-powered practice· Unlimited practice on eligible plans
PYQs with solutions
Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
Practice that adapts
Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
AI doubt support
Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.

Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.

This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.

More questions on Fault Analysis