GATE CS 2027Exam guide

GATE CSE 2027: Dates, Eligibility & Exam Pattern

Success Tracker Editorial11 min read

In short

GATE CSE 2027 (CS) is organised by IIT Madras. The GATE exam window is 6–21 Feb 2027; the paper slot is unannounced. GOAPS registration opens 2 September 2026 and closes 27 September 2026. The 3-hour test has 65 questions and 100 marks. Dates are liable to change.

On this page (13 sections)
Registration opens
2 Sep 2026
GOAPS portal
Last date
27 Sep 2026
5 Oct 2026 with late fee
Exam window
6–21 Feb 2027
Paper slots unannounced
Result
19 Mar 2027
Valid for 3 years

Dates follow the official GATE 2027 Important Dates page, checked 2026-09-06, which IIT Madras marks liable to change. The registration schedule has been revised. Always confirm on gate2027.iitm.ac.in before acting on any deadline.

GATE Computer Science and Information Technology — paper code CS, commonly called GATE CSE — covers mathematical foundations, programming, algorithms and computer systems. If you are considering postgraduate admission or recruitment through GATE, check each programme or employer's accepted paper codes and selection criteria; qualifying alone does not guarantee an offer.

This guide separates IIT Madras's published dates, eligibility and marking rules from our preparation advice. The syllabus section is a short orientation to the official CS PDF, not a replacement for its full topic list. The paper-specific date and admit-card release remain unannounced at the source check shown on this page.

What changed for GATE 2027

IIT Madras announces revised syllabi and changes to the test-paper list for GATE 2027. Check these official updates before reusing an older preparation plan:

  1. The syllabus was revised. The official website asks candidates to check the updated syllabi. Compare the current PDF for your paper with any older study list; do not assume that every change applies to every paper.
  2. Robotics and Automation (RA) is a new test paper. It joins the paper list as a standalone paper.
  3. Textile Engineering and Fibre Science moved. It is now a sectional paper under Engineering Sciences (XE) rather than a standalone paper.

GATE 2027 exam dates and registration schedule

The schedule below follows the official Important Dates page, checked 2026-09-06, rather than a frozen copy of the initial brochure. The examination is scheduled across three consecutive weekends in February 2027, with forenoon (9:30 AM to 12:30 PM) and afternoon (2:30 PM to 5:30 PM) sessions.

Official GATE 2027 schedule
  1. GOAPS application portal opens2 September 2026 (Wednesday)
  2. Regular registration closes27 September 2026 (Sunday)
  3. Extended registration closes (with late fee)5 October 2026 (Monday)
  4. Application rectification window opens14 October 2026 (Wednesday)
  5. Application rectification window closes21 October 2026 (Wednesday)
  6. Examination city intimated to candidates4 January 2027 (Monday)
  7. Admit card downloadTo be announced
  8. GATE 2027 examination6, 7, 13, 14, 20 & 21 February 2027
  9. Announcement of results19 March 2027 (Friday)

Dates follow the official GATE 2027 Important Dates page, checked 2026-09-06, which IIT Madras marks liable to change. The registration schedule has been revised. Always confirm on gate2027.iitm.ac.in before acting on any deadline.

As of the source check on 2026-09-06, the paper-wise and session-wise timetable was not announced. The overall GATE examination window does not establish your paper's date. Follow the official site for a later timetable before making travel or session-specific plans.

GATE 2027 CS exam pattern and marking scheme

Computer Science and Information Technology (paper code CS) is a three-hour computer-based test carrying 100 marks across 65 questions — 10 General Aptitude questions and 55 subject questions. Questions carry either 1 or 2 marks.

Duration
3 hours
Computer-based test
Questions
65
10 aptitude + 55 subject
Total marks
100
1 or 2 marks each
Language
English
All papers
Marks distribution — GATE CS 2027
  • Core subject questions72 (72%)Computer Science and Information Technology topics
  • General Aptitude15 (15%)Common to every GATE paper
  • Engineering Mathematics13 (13%)Paper-specific, drawn from the CS syllabus

Source: GATE 2027 Information Brochure, distribution of marks across test papers.

Engineering Mathematics carries 13 marks and General Aptitude 15, together 28 of 100. Our planning advice is to practise both regularly alongside core topics. This fixed split does not guarantee easy questions or a particular score.

The official question paper pattern specifies the following marking rules. The attempt advice and worked example below are our editorial interpretation, not an official strategy recommendation.

Question types and negative marking

MCQ — Multiple Choice

−1/3 or −2/3

  • Four options, exactly one correct.
  • The only type with negative marking. 1/3 mark is deducted for a wrong 1-mark MCQ, 2/3 mark for a wrong 2-mark MCQ.
  • Eliminate an option only when you can reliably establish that it is wrong; an uncertain elimination can lower your chance of being correct.

MSQ — Multiple Select

No penalty

  • Four options, one or more correct.
  • No negative marking, but no partial credit either — you score only if your selected set is exactly right.
  • No mark penalty does not mean no time cost. Return to uncertain questions after higher-confidence work.

NAT — Numerical Answer

No penalty

  • No options; key in a signed real number on a virtual keypad.
  • No negative marking.
  • Watch the rounding instruction.

MSQ and NAT have no negative marking, so a plausible final answer with time left may be worthwhile. But time and attention have an opportunity cost: spending several minutes guessing can displace a question you know how to solve. Prioritise solvable questions, set a return-later threshold in mocks, and use remaining time for considered attempts. MSQs require the exact correct set, while NAT entry must follow the stated precision instructions.

GATE CS 2027 syllabus overview

The 10 official sections below come from the IIT Madras CS syllabus PDF, checked 2026-09-06. These are selected excerpts from our full transcription, not an exhaustive topic list. Section names and quoted coverage retain the official wording; an ellipsis marks shortened text. General Aptitude is additional.

  • Engineering Mathematics — Discrete Mathematics: Propositional and first order logic. Sets, relations, functions, partial orders and lattices. Monoids, Groups. Graphs: connectivity, matching, colouring… / Linear Algebra: Matrices, determinants, system of linear equations, eigenvalues and eigenvectors, LU decomposition. / Calculus: Limits, continuity and differentiability, Maxima and minima, Mean value theorem, Integration. / Probability and Statistics: Random variables, Uniform, normal, exponential, Poisson and binomial distributions. Mean, median, mode and standard deviation…
  • Digital Logic — Boolean algebra and minimization – algebraic technique, Karnaugh map, tabular method. Design of combinational and sequential circuits…
  • Computer Organization and Architecture — Instruction set and addressing modes. Design of arithmetic and logic unit (ALU). Design of control unit – hardwired and microprogrammed…
  • Programming and Data Structures — Programming in C. Recursion. Arrays, stacks, queues, linked lists, trees, binary search trees, binary heaps, graphs.
  • Algorithms — Searching, sorting, hashing. Asymptotic worst case time and space complexity. Algorithm design techniques: greedy, dynamic programming and divide‐and‐conquer…
  • Theory of Computation — Regular expressions and finite automata. Context-free grammars and push-down automata. Regular and context-free languages, pumping lemma…
  • Compiler Design — Lexical analysis, parsing, syntax-directed translation. Runtime environments. Intermediate code generation. Local optimisation…
  • Operating System — System calls, processes, threads, inter‐process communication, concurrency and synchronization. Deadlock. CPU and I/O scheduling…
  • Databases — ER‐model. Relational model: relational algebra, tuple calculus, SQL. Integrity constraints, normal forms. File organization, indexing (e.g., B and B+ trees)…
  • Computer Networks — Principles of Layering; Basics of switching (circuit, packet and virtual circuit) and performance metrics; Data link layer: error detection…

Use the CS practice syllabus tree to organise revision, but use the full official PDF to decide scope. Our practice taxonomy is not a substitute for the revised 2027 document.

How to prepare for GATE CSE 2027

The following is an editorial study sequence, not an official timetable or a score promise. Start with a diagnostic set from each area, then adjust the sequence to your gaps and weekly study time. In CS, shared prerequisites can make it useful to study related subjects together.

Sequence subjects around prerequisites

  1. Discrete Mathematics and Programming and Data Structures. Practise logic, relations, counting and tracing C programs before tackling proofs or algorithm analysis. Use small inputs to check recursion, pointer updates and data-structure invariants.
  2. Algorithms, then Theory of Computation and Compiler Design. Analyse an algorithm's time and space use, then connect automata and grammars to lexical analysis and parsing. Keep compiler topics in the plan rather than assuming automata practice covers them all.
  3. Digital Logic, then Computer Organization and Architecture. Connect circuit behaviour to ALU and control-unit design, then work through cache mapping and pipeline hazards using explicit address or instruction traces.
  4. Operating System, Databases and Computer Networks. Separate assumptions before calculating: scheduling policy, transaction isolation or the particular network-layer mechanism can change the answer.
  5. Engineering Mathematics and General Aptitude throughout. Reserve recurring sessions and measure progress through attempted problems, not just chapters read.

Allocate time to the fixed 28-mark component

General Aptitude carries 15 marks and Engineering Mathematics 13. That published allocation justifies including both in your schedule, but it does not make them easier than every core subject. Compare accuracy and time per question in your own mocks before reallocating study hours.

Practise attempt decisions alongside content

  • For MSQ and NAT, no negative marking removes the mark penalty, not the time cost. Prioritise questions you can solve and return to uncertain ones with time remaining.
  • For MCQs, record why an option is wrong before eliminating it. The shared worked example shows zero expected marks for uniform blind guessing, and why only reliable elimination changes that calculation.
  • Track MCQ accuracy separately, including the marks lost to incorrect attempts. Distinguish a concept error from an unjustified elimination or a transcription slip.
  • Practise full-length tests without interruptions. Once IIT Madras publishes your session, try some mocks at that time rather than guessing whether CS will be in the forenoon.

Turn a mock result into the next practice set

Replace a broad note such as 'revise operating systems' with a testable task: 'trace FIFO and LRU on the same reference string, then explain each replacement'. Record the mistaken step, solve another question on the same concept and retest later without notes. The GATE CS syllabus tree can help organise this log; the official PDF remains the scope reference.

GATE 2026 vs 2027: selected syllabus comparisons

Checked 2026-09-06: we compared the text of the official IIT Guwahati GATE 2026 PDF with the official IIT Madras GATE 2027 PDF linked below. The rows are editorial summaries of selected passages, not verbatim transcriptions or an official change log. PDF layout, spacing and hyphenation differences are normalized; section and PDF-page references identify the compared scope. This is not an exhaustive list of additions or removals, and unchanged components are labelled explicitly.

Selected official-PDF wording comparisons; interpretation is editorial, not a prediction of questions or marks.
Compared topic / passageGATE 2026 wording / scopeGATE 2027 wording / scopeHow to interpret the comparison
Digital Logic — section 2, page 1 in both PDFsBoolean algebra, combinational and sequential circuits, and minimization are listed without naming minimization methods.Minimization explicitly names algebraic technique, Karnaugh map and tabular method; the circuit wording is now design of combinational and sequential circuits.More explicit wording within an existing subject, not evidence that Boolean minimization or circuit design first became relevant in 2027. Use the named methods to check the coverage of older notes.
Computer Organization and Architecture — section 3, page 1 in both PDFsLists machine instructions and addressing modes; ALU, data-path and control unit; memory hierarchy including cache, main memory and secondary storage; pipelining and I/O interface.Specifies ALU design, hardwired and microprogrammed control-unit design, memory interfacing and hierarchy performance, and cache memory mapping; pipelining and interrupt/DMA interfaces remain listed.The 2027 wording makes particular design and memory topics explicit. It does not establish that every newly named detail was outside the broader 2026 headings.
Algorithms — section 5, page 1 in both PDFsSearching, sorting, hashing; asymptotic worst case time and space complexity; greedy, dynamic programming and divide-and-conquer; graph traversals, minimum spanning trees and shortest paths.Searching, sorting, hashing; asymptotic worst case time and space complexity; greedy, dynamic programming and divide-and-conquer; graph traversals, minimum spanning trees and shortest paths.Compared scope unchanged. These algorithm techniques and graph problems are not new 2027 additions; the subject list is the same after normalizing PDF spacing and hyphenation.
Computer Networks — section 10, page 2 in both PDFsNames OSI and TCP/IP stacks, framing, Ethernet bridging, shortest-path and flooding routing, ARP/DHCP/ICMP, UDP/TCP, and DNS/SMTP/HTTP/FTP/Email alongside switching, IPv4 and other topics.Uses principles of layering; explicitly mentions switching performance metrics; retains error detection, MAC, Ethernet, distance-vector/link-state routing, IPv4 fragmentation/CIDR/NAT, TCP flow/congestion control, socket API, DNS and HTTP.The list is rewritten and several 2026 names are no longer explicit, including ARP, DHCP, ICMP, UDP, SMTP and FTP. This is a wording comparison, not permission to discard supporting network knowledge or a guarantee those concepts cannot be used in a question.

Compare both official syllabus PDFs

Worked example

Original illustration: two addresses competing for one cache line

This is an original teaching illustration, not an official PYQ or a predicted question. Its purpose is to practise a method under explicit assumptions, not to forecast topic weightage or exam difficulty.

A byte-addressed machine has 16-bit addresses and an initially empty, direct-mapped cache with 1 KiB of data capacity and 16-byte blocks. Capacity excludes tags and valid bits; 1 KiB = 1024 bytes. Each read miss loads the complete aligned block before the next read. With no prefetching or other accesses, read byte addresses 0x1234, 0x1634, then 0x1234 again. Find the offset, index and tag widths, the fields of the first address, and the hit/miss sequence. Number cache lines from zero.

  1. There are 1024 / 16 = 64 cache lines. A block has 16 = 2^4 bytes, so the byte offset needs 4 bits. Selecting one of 64 = 2^6 lines needs 6 index bits; the tag uses the remaining 16 - 4 - 6 = 6 bits.
  2. For address A, offset = A mod 16, index = floor(A / 16) mod 64, and tag = floor(A / 1024). The first address is 0x1234 = 4660: offset = 4, index = 291 mod 64 = 35, tag = 4. Reconstruct it as 4 × 1024 + 35 × 16 + 4 = 4660.
  3. The first read misses because line 35 is invalid, then installs tag 4. Next, 0x1634 = 5684 has offset 4, index 355 mod 64 = 35, and tag 5. Its tag differs, so it misses and replaces line 35 even though most other lines are empty.
  4. The final 0x1234 read finds tag 5 rather than tag 4 in line 35, so it misses again. This last access demonstrates a conflict miss: a previously loaded block was displaced by another block mapped to the same line. Matching the index alone never establishes a hit.

Answer: 4 offset bits, 6 index bits, 6 tag bits. Address 0x1234 has byte offset 4, line index 35 and tag 4. Read sequence: miss, miss, miss; 0 hits in 3 reads.

Source check: 2026-09-06. The conceptual reading below supports the method; the official syllabus PDF supports topic scope only. Neither source supplies or endorses this original worked example.

Read the method and check the official scope

Preparation checklist

Use these editorial prompts for a weekly plan and individual study sessions. Adjust the workload to your available time and current understanding. They are not an official study schedule or a score guarantee, and this one example does not cover the whole paper.

  • At the start of the week, mark two unfinished subtopics in the official CS syllabus and schedule one concept session and one closed-notes problem session for each; rotate beyond architecture into the other sections.
  • Before each architecture session, write the addressable unit, data capacity, block size and mapping rule. Split one address into fields and reconstruct it to catch byte/word and bit-count errors.
  • In an algorithms session this week, trace a small input, state the invariant and count operations before writing a complexity bound; include one empty or boundary-size input.
  • In the next OS or databases session, draw a process timeline or enumerate a transaction schedule before calculating; record the scheduling policy or dependencies instead of silently inventing them.
  • Once this week, attempt a timed mixed set that includes Engineering Mathematics and General Aptitude. Record attempted, correct and incorrect answers separately, then classify each error as a concept, trace, arithmetic or reading error.
  • At the next review session, use MIT slides 25–29 to explain one cache mistake, then redo it without the source. Reattempt missed problems after 48 hours and choose next week's sessions from the errors that persist.

Eligibility, fees and number of papers

The brochure sets a single academic bar: a candidate currently studying in the third or higher year of any undergraduate degree programme, or who has already completed a government-approved degree in Engineering, Technology, Architecture, Science, Commerce, Arts or Humanities, is eligible. There is no age limit and no cap on the number of attempts.

  • Papers: you may appear in one or two test papers. A second paper must be chosen from the allowed two-paper combinations listed in the brochure — the combinations are not free-form.
  • Score validity: a GATE 2027 score stays valid for 3 years from the date the results are announced.
  • Mode: computer-based test, in English only, conducted at centres across 300+ cities in India. There are no international centres for GATE 2027.
  • Two-paper fees: check the table for your category and registration period. The official extended-period two-paper amount is not obtained by doubling the extended one-paper fee.
Age limit
None
No cap on attempts either
Papers allowed
1 or 2
From the allowed combinations
Score validity
3 years
From the result date
Exam centres
300+ cities
India only, no overseas centres
GATE 2027 application fees — official fees page checked 2026-09-06
CategoryRegular: one paperRegular: two papersExtended: one paperExtended: two papers
Female / SC / ST / PwD candidates₹1,000₹2,000₹1,500₹2,500
All other candidates including foreign nationals₹2,000₹4,000₹2,500₹4,500

Registration happens only through the GATE Online Application Processing System (GOAPS), reachable from the official website. Nothing is submitted on paper — IIT Madras explicitly asks candidates not to post printed application forms or documents.

Practising GATE CS previous year questions

Previous year questions show how CS topics were examined in those years; they do not predict the next paper. Try an untimed set to diagnose understanding, then a timed paper to check pacing. For each error, record the concept, the incorrect step and a corrected solution you can reproduce without notes.

Use the GATE CS resource hub to find available released papers and question-backed revision companions, or organise study with the GATE CS topic map. The resource hub checks availability before displaying practice links; it also links official past papers when our archive does not yet cover a stream.

Frequently asked questions

Who is conducting GATE CSE 2027?

IIT Madras is the Organizing Institute for GATE 2027. The exam is conducted jointly by IISc and the IITs on behalf of the National Coordination Board – GATE, Department of Higher Education, Ministry of Education. Use gate2027.iitm.ac.in for current announcements.

What is the GATE CSE 2027 exam date?

The GATE 2027 exam window covers 6, 7, 13, 14, 20 & 21 February 2027. As of 2026-09-06, the specific day and session for CS is not yet announced. Check the official paper-wise timetable when published; dates are liable to change.

Has the GATE CSE syllabus changed for 2027?

IIT Madras announces revised syllabi for 2027. Use the current CS PDF to check each topic rather than assuming an older study list is unchanged. This guide includes only selected coverage from the ten official sections.

Can third-year students apply for GATE CSE 2027?

Yes. Candidates currently in the third or higher year of an undergraduate degree programme, or who have completed a government-approved degree, should check the official qualification table for their degree. There is no age limit or restriction on attempts. Admission eligibility is a separate matter set by each institution.

Is there negative marking in GATE CSE 2027?

Only MCQs have negative marking: 1/3 mark for a wrong 1-mark answer and 2/3 mark for a wrong 2-mark answer. MSQ and NAT have no negative marking. MSQs have no partial marking; the selected set must be exactly correct.

How long is a GATE 2027 score valid?

A GATE 2027 score remains valid for 3 years from the date the results are announced. Results are scheduled for 19 March 2027; dates are liable to change.

Official GATE 2027 resources

Track your GATE CS 2027 preparation subtopic by subtopic

Practice tagged to the GATE CS syllabus tree, timed full-length tests, and a skill score for every subtopic so you can see what is actually weak instead of guessing.

Start free

Available GATE CS subject practice

These revision companions have questions in the released archive. Their study topics may group the official syllabus differently; use the current PDF to check scope.

Sources

Exam facts and syllabus scope come from the official sources below. Conceptual references support the original worked examples, not exam predictions. Comparisons and preparation suggestions are editorial; source-check dates do not certify an independent human review. Exam reference pages checked .

  1. GATE 2027 Important Dates — checked 2026-09-06Current registration dates, examination window, result date and dates-liable-to-change caveat; checked 2026-09-06.
  2. GATE 2027 official website — IIT MadrasOrganizing Institute, examination dates, registration schedule, eligibility, fees and paper list.
  3. GATE 2027 Computer Science and Information Technology syllabus (PDF)The official, revised CS syllabus for GATE 2027, checked 2026-09-06; section names and topic wording used in the transcription and overview.
  4. GATE 2027 question paper patternMarks distribution, question types (MCQ/MSQ/NAT) and the negative marking scheme, checked 2026-09-06. The worked expectation example is editorial analysis of these rules.
  5. GATE 2027 eligibility criteriaAcademic qualifications and degree-specific eligibility for taking GATE; admission and recruitment criteria are separate.
  6. GATE 2027 application feesPer-paper fees for the regular and extended registration periods and the fee payable for two papers.
  7. GATE 2027 two-paper combinationsRestrictions on choosing a second test paper and the need to check the current allowed pairing list.
  8. GATE 2026 CS official syllabus — IIT Guwahati (PDF)The 2026 passages in the selected CS syllabus comparison, checked 2026-09-06; section and page references are given in each row.
  9. MIT OpenCourseWare 6.004: Caches and the Memory HierarchyConceptual reference: direct mapping, address tags, valid bits, block size and conflict misses (slides 25–29). The addresses and worked arithmetic here are original, not an MIT or GATE question.

Success Tracker is an independent platform and is not affiliated with IIT Madras, IISc, the National Coordination Board–GATE or the Ministry of Education. Always confirm dates and rules on the official GATE 2027 website before acting on them. Editorial responsibility rests with The ML Hub Private Limited. To flag an error, send a correction with the article URL and primary source. Read our editorial standards.

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