GATE CS 2015 Set 1 — Question 53

Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.
MCQ+2 / -0.67MediumFlip-Flop ConversionsSequential CircuitsDigital LogicCounters (Sync, Async)

Digital Logic → Sequential Circuits → Counters (Sync, Async)

Last updated

Question

A positive edge-triggered D flip-flop is connected to a positive edge-triggered JK flip-flop as follows. The QQ output of the D flip-flop is connected to both the J and K inputs of the JK flip-flop, while the QQ output of the JK flip-flop is connected to the input of the D flip-flop. Initially, the output of the D flip-flop is set to logic one and the output of the JK flip-flop is cleared. Which one of the following is the bit sequence (including the initial state) generated at the QQ output of the JK flip-flop when the flip-flops are connected to a free-running common clock? Assume that J = K = 1 is the toggle mode and J = K = 0 is the state-holding mode of the JK flip-flop. Both the flip-flops have non-zero propagation delays.
Your answer

Choose one option, then check your answer.

The solution stays hidden until you check.

Continue learning with Success Tracker

A step still unclear? Work through it with support

Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.

AI-powered practice· Unlimited practice on eligible plans
PYQs with solutions
Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
Practice that adapts
Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
AI doubt support
Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.

Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.

This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.

More questions on Sequential Circuits