GATE CS 2015 Set 2 — Question 65
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Digital Logic → Combinational Circuits → Adders & Subtractors
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Question
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using four full adders. The total propagation time of this 4-bit binary adder in microseconds is ___________.
Correct answer
19.2 to 19.2
Solution
Given:
Delay of AND gate () = Delay of OR gate () = .
Delay of XOR gate () = .A Full Adder (FA) is constructed using two Half Adders (HA) and one OR gate.
Structure of FA:
Delay of AND gate () = Delay of OR gate () = .
Delay of XOR gate () = .A Full Adder (FA) is constructed using two Half Adders (HA) and one OR gate.
Structure of FA:
1.HA1: Inputs . Outputs Sum1 () and Carry1 ().
- Delay for Sum1 = .
- Delay for Carry1 = .
- The input Sum1 is available after .
- Delay for Carry2 output relative to inputs = Delay(Sum1) + .
- Carry1 is ready at .
- Carry2 is ready at .
- is ready at .
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