GATE CS 2016 Set 2 — Question 17
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Digital Logic → Combinational Circuits → Adders & Subtractors
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Question
Consider an eight-bit ripple-carry adder for computing the sum of and , where and are integers represented in 2’s complement form. If the decimal value of is one, the decimal value of that leads to the longest latency for the sum to stabilize is __________.
Correct answer
-1
Solution
In a ripple-carry adder, the worst-case delay (longest latency) occurs when a carry is generated at the least significant bit (LSB) position and propagates through all the bits to the most significant bit (MSB) position (and potentially out).Let the 8-bit representations be and .
Given , in 8-bit 2's complement, . So, and for .
In 2's complement notation, the bit pattern represents the decimal value .Thus, .
Given , in 8-bit 2's complement, . So, and for .
1.Carry Generation at LSB: To start the carry chain, a carry must be generated at bit 0. The generate condition is . Since , we must have .
2.Carry Propagation: For the carry to ripple through the remaining bits, the propagate condition must hold for . Since for these bits, we have , which implies for all .
Combining these, must be .In 2's complement notation, the bit pattern represents the decimal value .Thus, .
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