GATE CS 2017 Set 2 — Question 42
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Digital Logic → Sequential Circuits → Counters (Sync, Async)
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Question
The next state table of a 2-bit saturating up-counter is given below.
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for and are
| 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 1 | 1 |
Correct answer
(B) T₁ = Q₁ Q₀, T₀ = Q₁ + Q₀
Solution
To find the expressions for and , we use the excitation table of a T flip-flop, where .
For :
is 1 only when .
So, .For :
is 1 for minterms .
Using the absorption law :
.Thus, and , which matches option (B).
| 0 | 0 | 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 | 1 | 1 |
| 1 | 0 | 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 | 0 | 0 |
is 1 only when .
So, .For :
is 1 for minterms .
Using the absorption law :
.Thus, and , which matches option (B).
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