GATE CS 2017 Set 2 — Question 42

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MCQ+2 / -0.67MediumCounters (Sync, Async)Sequential CircuitsDigital LogicFlip-Flops (JK, T, D)

Digital Logic → Sequential Circuits → Counters (Sync, Async)

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Question

The next state table of a 2-bit saturating up-counter is given below.
Q1Q_1Q0Q_0Q1+Q_1^+Q0+Q_0^+
0001
0110
1011
1111
The counter is built as a synchronous sequential circuit using T flip-flops. The expressions for T1T_1 and T0T_0 are
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