GATE CS 2021 Set 1 — Question 38
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+2 / -0.67MediumCounters (Sync, Async)Sequential CircuitsDigital LogicFlip-Flops (JK, T, D)
Digital Logic → Sequential Circuits → Counters (Sync, Async)
Last updated
Question
Consider a 3-bit counter, designed using T flip-flops, as shown below:Assuming the initial state of the counter given by PQR as 000, what are the next three states?
Correct answer
(A) 011, 101, 000
Solution
The circuit consists of three T flip-flops () with outputs . The T inputs are all connected to logic 1 (implied by the common rail usually connected to ). The clocking arrangement is:
- is clocked by the external Clock Pulse.
- is clocked by the output of the first flip-flop.
- is clocked by the inverted output of the second flip-flop.
- sees a rising edge. Since , toggles: .
- The clock input of is . Since goes (rising edge), triggers. Since , toggles: .
- The clock input of is . Since goes , goes (falling edge). does not trigger. holds: .
- Next State: .
- sees a rising edge. toggles: .
- clock () goes (falling edge). does not trigger. holds: .
- clock () sees no change (since held). holds: .
- Intermediate State: . (Note: This state appears in the sequence but might be skipped in the options or considered transient if the question implies a specific sampling. However, let's check the next toggle).
- sees a rising edge. toggles: .
- clock () goes (rising edge). triggers. toggles: .
- clock () goes (rising edge, since went ). triggers. toggles: .
- Next State: .
- sees rising edge. toggles: .
- clock () sees falling edge. Holds.
- clock () sees no change. Holds.
- Intermediate State: .
- sees rising edge. toggles: .
- clock () sees rising edge. toggles: .
- clock () sees falling edge. Holds.
- Next State: .
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Sequential Circuits
2026 Set 2 Q16Which one of the following options is not a property of Boolean Algebra? Note: is OR…2026 Set 1 Q21Consider the following Boolean expression of a function :…2026 Set 1 Q22Consider the 8-bit signed integers and represented using the sign-magnitude form. The…2026 Set 2 Q28In a system, numbers are represented using 4-bit two’s complement form. Consider four numbers…2026 Set 2 Q34The 32-bit IEEE 754 single precision representation of a number is . The number…