GATE CS 2021 Set 2 — Question 38
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Digital Logic → Sequential Circuits → FSM Design
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Question
Suppose we want to design a synchronous circuit that processes a string of 0's and 1's. Given a string, it produces another string by replacing the first 1 in any subsequence of consecutive 1's by a 0. Consider the following example.Input sequence:
Output sequence:
A Mealy Machine is a state machine where both the next state and the output are functions of the present state and the current input. The above mentioned circuit can be designed as a two-state Mealy machine. The states in the Mealy machine can be represented using Boolean values 0 and 1. We denote the current state, the next state, the next incoming bit, and the output bit of the Mealy machine by the variables , , and respectively. Assume the initial state of the Mealy machine is 0.
What are the Boolean expressions corresponding to and in terms of and ?
Output sequence:
A Mealy Machine is a state machine where both the next state and the output are functions of the present state and the current input. The above mentioned circuit can be designed as a two-state Mealy machine. The states in the Mealy machine can be represented using Boolean values 0 and 1. We denote the current state, the next state, the next incoming bit, and the output bit of the Mealy machine by the variables , , and respectively. Assume the initial state of the Mealy machine is 0.
What are the Boolean expressions corresponding to and in terms of and ?
Correct answer
(B) t = b y = sb
Solution
Let the state represent whether we have just seen a 1 (i.e., we are inside a sequence of 1s).
Deriving Boolean Expressions:
- : The previous bit was 0 (or we are at the start). We are not currently in a sequence of 1s.
- : The previous bit was 1. We are currently inside a sequence of 1s.
1.Current State (Previous bit 0):
- Input : The sequence of 0s continues. Output . Next state .
- Input : This is the first 1 of a new sequence. The problem states we must replace the first 1 with 0. So, Output . Since the current bit is 1, the next state becomes .
- Input : The sequence of 1s has ended. Output . Next state .
- Input : This is a subsequent 1 in the sequence. We should output it as is. Output . Since the current bit is 1, the next state remains .
| Current State () | Input () | Next State () | Output () |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 0 | 0 |
| 1 | 1 | 1 | 1 |
- For : Looking at the column for , it is exactly the same as the input column .
- For : The output is 1 only when and .
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