GATE CS 2025 Set 2 — Question 31
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Digital Logic → Boolean Algebra & Logic Gates → Boolean Laws & Theorems
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Question
Consider the following logic circuit diagram.Which is/are the CORRECT option(s) for the output function ?
Correct answer
(A) XY; (B) X + Y + XY; (C) XY + X + XY
Solution
Let's analyze the circuit to determine the output function .1. Identify Inputs and Gates:
The inputs to the final OR gate are:
We know that (De Morgan's Law).
Substitute this into the expression:This matches Option (B).Further simplification:Since :Using De Morgan's Law again:This matches Option (A).4. Check Option (D):
Option (D) is , which is not equivalent to .Conclusion:
Options (A), (B), and (C) are all correct representations of the output function .
- The circuit has two inputs, and .
- Top Gate: A NAND gate with inputs and . Output = .
- Middle Gate: A NOT gate connected to input . Output = .
- Bottom Structure:
- A NOT gate connected to input . Output = .
- An AND gate with inputs and . Output = .
- Final Gate: An OR gate that sums the outputs of the previous stages.
The inputs to the final OR gate are:
1. (from the NAND gate)
2. (from the middle NOT gate)
3. (from the bottom AND gate)
Thus, the raw expression for the output is:This matches Option (C).3. Simplify the Expression:We know that (De Morgan's Law).
Substitute this into the expression:This matches Option (B).Further simplification:Since :Using De Morgan's Law again:This matches Option (A).4. Check Option (D):
Option (D) is , which is not equivalent to .Conclusion:
Options (A), (B), and (C) are all correct representations of the output function .
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