GATE EE 2021 Set 1 — Question 62
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Analog & Digital Electronics → Operational Amplifiers → Comparator & Schmitt Trigger
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Question
A CMOS Schmitt-trigger inverter has a low output level of and a high output level of . It has input thresholds of and . The input capacitance and output resistance of the Schmitt-trigger are negligible. The frequency of the oscillator shown is ______ . (Round off to 2 decimal places.)
Correct answer
3150 to 3170
Solution
The time period of a Schmitt-trigger oscillator is the sum of the charging time and discharging time of the capacitor.
1.Charging phase (Output High ): The capacitor charges from towards . It switches when it reaches .
2.Discharging phase (Output Low ): The capacitor discharges from towards . It switches when it reaches .
3.Total Period and Frequency:
Rounding to two decimal places, we get .Continue learning with Success Tracker
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