GATE CS 2019 Set 1 — Question 43
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Operating System → Memory Management → TLB & EAT
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Question
Assume that in a certain computer, the virtual addresses are 64 bits long and the physical addresses are 48 bits long. The memory is word addressable. The page size is 8 kB and the word size is 4 bytes. The Translation Look-aside Buffer (TLB) in the address translation path has 128 valid entries. At most how many distinct virtual addresses can be translated without any TLB miss?
Correct answer
(B) 256 × 2¹⁰
Solution
The question asks for the number of distinct virtual addresses that can be translated using the TLB entries.
(A)
(B)
(C)
(D) Option (B) matches the calculated value.
1.TLB Entries: The TLB has 128 entries. This means it can hold mappings for 128 distinct pages at any time.
2.Page Size: The page size is 8 kB = bytes = 8192 bytes.
3.Word Size: The memory is word addressable with a word size of 4 bytes.
4.Addresses per Page: Since memory is word addressable, each address points to a 4-byte word. The number of distinct addresses (words) in one page is:
So, one page corresponds to distinct virtual addresses.5.Total Addressable Range: With 128 TLB entries, the total number of addresses that can be translated without a miss is:
Let's check the options:(A)
(B)
(C)
(D) Option (B) matches the calculated value.
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