GATE CS 2026 Set 1 — Question 37

MCQ+2 / -0.67MediumCounters (Sync, Async)Sequential CircuitsDigital LogicFSM Design

Digital Logic → Sequential Circuits → Counters (Sync, Async)

Last updated 5 September 2026

Question

P

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D_1 = P Q_1 + \bar{P} Q_0 + Q_1 Q_0 \quad D_0 = P Q_0 + \bar{P} Q_1 + Q_1 \overline{Q_0}

D_1 = \bar{P} Q_1 + \bar{P} Q_0 + Q_1 Q_0 \quad D_0 = \bar{P} \overline{Q_0} + \bar{P} Q_1 + Q_1 \overline{Q_0}

D_1 = \bar{P} \overline{Q_1} + \bar{P} Q_0 + Q_1 Q_0 \quad D_0 = \bar{P} Q_0 + \bar{P} Q_1 + Q_1 \overline{Q_0}

D_1 = P \overline{Q_1} + \bar{P} Q_0 + Q_1 Q_0 \quad D_0 = P \overline{Q_0} + \bar{P} Q_1 + Q_1 \overline{Q_0}

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D_1

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D_1

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