GATE EC 2021 Set 1 — Question 18
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Analog Circuits → BJT & MOSFET Amplifiers → CS, CD & CG Configurations
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Question
In the circuit shown in the figure, the transistors and are operating in saturation. The channel length modulation coefficients of both the transistors are non-zero. The transconductance of the MOSFETs and are and , respectively, and the internal resistance of the MOSFETS and are and , respectively.Ignoring the body effect, the ac small signal voltage gain () of the circuit is


Correct answer
(D) -gₘ₂(1gₘ₁ rₒ₁ rₒ₂)
Solution
The circuit consists of two cascaded MOSFET stages:
The total voltage gain is the product of the gains of the two stages:
This derived expression does not directly match any of the given options. This indicates a potential discrepancy in the question or options, which is not uncommon in competitive exams. However, since a specific option (D) is marked as correct in the answer key, we must acknowledge that the intended solution might involve a non-standard interpretation or approximation not immediately obvious from the standard small-signal analysis of this common configuration.Let's analyze the structure of option (D): .
This form suggests a common-source amplifier with transconductance and a load resistance . However, in the given circuit, is a source follower, not a common-source amplifier, and the input is applied to .Given the discrepancy, and without further context or clarification on the intended interpretation, it's challenging to rigorously derive option (D) from the provided circuit using standard small-signal analysis. This type of situation often points to an error in the question itself or the provided options/answer key. However, as per the instructions, we must provide a solution leading to the given answer.Assuming the provided answer key is correct, this question is likely flawed or relies on a highly specific, non-standard interpretation or approximation that is not generally taught or expected for this circuit configuration. Therefore, a detailed step-by-step derivation to option D is not feasible with standard circuit analysis for the given diagram.Final Answer is D based on the provided answer key, despite the standard analysis yielding a different result.
1.MOSFET (Common-Source Stage):
- Input is applied to the gate of .
- The source of is grounded.
- The drain of is connected to the gate of .
- The small-signal voltage at the drain of () is given by , where is the output resistance of loaded by the input impedance of .
- Since the gate of is an open circuit for AC, the load seen by is effectively its own output resistance .
- Therefore, . This voltage acts as the input to the second stage, i.e., .
- Input is applied to the gate of .
- The drain of is connected to (which is AC ground).
- The output is taken from the source of .
- The small-signal voltage gain of a source follower is , where is the resistance from the source to ground.
- In this circuit, (the internal resistance of from source to drain, with drain at AC ground).
- So, .
The total voltage gain is the product of the gains of the two stages:
This derived expression does not directly match any of the given options. This indicates a potential discrepancy in the question or options, which is not uncommon in competitive exams. However, since a specific option (D) is marked as correct in the answer key, we must acknowledge that the intended solution might involve a non-standard interpretation or approximation not immediately obvious from the standard small-signal analysis of this common configuration.Let's analyze the structure of option (D): .
This form suggests a common-source amplifier with transconductance and a load resistance . However, in the given circuit, is a source follower, not a common-source amplifier, and the input is applied to .Given the discrepancy, and without further context or clarification on the intended interpretation, it's challenging to rigorously derive option (D) from the provided circuit using standard small-signal analysis. This type of situation often points to an error in the question itself or the provided options/answer key. However, as per the instructions, we must provide a solution leading to the given answer.Assuming the provided answer key is correct, this question is likely flawed or relies on a highly specific, non-standard interpretation or approximation that is not generally taught or expected for this circuit configuration. Therefore, a detailed step-by-step derivation to option D is not feasible with standard circuit analysis for the given diagram.Final Answer is D based on the provided answer key, despite the standard analysis yielding a different result.
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