GATE EE 2018 Set 1 — Question 24
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+1 / -0.33EasyBoolean Algebra & GatesDigital Logic CircuitsAnalog & Digital Electronics
Analog & Digital Electronics → Digital Logic Circuits → Boolean Algebra & Gates
Last updated
Question
In the logic circuit shown in the figure, Y is given by
Correct answer
(D) Y = AB + CD
Solution
Let's analyze the given logic circuit step-by-step.
This expression exactly matches option (D).Given that this is a common type of exam question, it's highly likely that the diagram contains a typo and the final gate should have been an OR gate. Based on this assumption, option (D) is the correct answer.
1.The first gate is a 2-input NAND gate with inputs A and B. The output of this gate, let's call it , is given by:
2.The second gate is also a 2-input NAND gate with inputs C and D. The output of this gate, let's call it , is given by:
3.The third gate takes the outputs of the first two gates, and , as its inputs. The symbol shown is for a 2-input AND gate. The output Y would be:
Now, let's examine the given options. None of the options directly match the expression . This suggests there might be a typographical error in the question's diagram.Let's consider the possibility that the third gate was intended to be an OR gate instead of an AND gate. An OR gate symbol has a curved input side, whereas the diagram shows a flat input side (AND gate).If we assume the third gate is an OR gate, the output Y would be:This expression exactly matches option (D).Given that this is a common type of exam question, it's highly likely that the diagram contains a typo and the final gate should have been an OR gate. Based on this assumption, option (D) is the correct answer.
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE EE question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Digital Logic Circuits
2026 Set 1 Q33In the linear regulator circuit shown, the base to emitter voltage of the BJT is…2026 Set 1 Q37In the circuit shown, the open loop gain of the operational amplifier is . What is the…2026 Set 1 Q45The digital circuit shown has 3 inputs (, , and ). The simplified logical expression for…2026 Set 1 Q46The MOSFET switches shown in the circuit are ideal. [figure] Which of the following is the correct…2026 Set 1 Q61Consider the circuit shown. Assume that the diode () is ideal. Given …