GATE EE 2018 Set 1 — Question 24
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Analog & Digital Electronics → Digital Logic Circuits → Boolean Algebra & Gates
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Question
In the logic circuit shown in the figure, Y is given by
Correct answer
(D) Y = AB + CD
Solution
Step 1 — First level gatesBoth input gates are NAND gates (AND shape with an output bubble):Step 2 — Output gateThe third gate also carries a bubble on its output, so it is a NAND gate with inputs and :Step 3 — Apply De Morgan's theoremSo three NAND gates connected in this way realise the sum-of-products (AND-OR) function: the first two gates form the products and , and the output NAND, by De Morgan, ORs them.Step 4 — Choose the optionOption (A) is a single 4-input AND, option (B) is a product of sums, and option (C) is a 4-input OR — none of these is produced by this network. Option (D) is exactly the expression obtained above.Answer: (D)
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