GATE EE 2022 Set 1 — Question 29
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Analog & Digital Electronics → Digital Logic Circuits → Latches, Flip-Flops & Counters
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Question
The maximum clock frequency in MHz of a 4-stage ripple counter, utilizing flip-flops, with each flip-flop having a propagation delay of , is ___________. (round off to one decimal place)
Correct answer
12.3 to 12.7
Solution
In a ripple counter (asynchronous counter), the clock pulse ripples through the flip-flops. The total propagation delay is the sum of the delays of all stages.Given:
The maximum frequency is the reciprocal of the total propagation delay:Rounding off to one decimal place, the answer is 12.5.
- Number of stages () = 4
- Propagation delay of each flip-flop () =
The maximum frequency is the reciprocal of the total propagation delay:Rounding off to one decimal place, the answer is 12.5.
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