GATE EE 2023 Set 1 — Question 56
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Analog & Digital Electronics → Digital Logic Circuits → Latches, Flip-Flops & Counters
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Question
Neglecting the delays due to the logic gates in the circuit shown in figure, the decimal equivalent of the binary sequence [ABCD] of initial logic states, which will not change with clock, is ____________.
Correct answer
8 to 8
Solution
Let be the output of the first (left) flip-flop and that of the second one. Reading the circuit:
- , since point is taken from the output of the first flip-flop.
- Both inputs of the NOR gate are tied to , so the gate works as an inverter:
- , the output of the second flip-flop; this node also drives the input of the first flip-flop.
- (X-OR output); this node drives the input of the second flip-flop.
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