GATE EC 2014 Set 2 — Question 52
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Digital Circuits → Computer Organization → Machine Instructions & Addressing
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Question
For the 8085 microprocessor, the interfacing circuit to input 8-bit digital data () from an external device is shown in the figure. The instruction for correct data transfer is
Correct answer
(D) LDA F8F8H
Solution
Decoder enable. is driven by , so . The active-low enables and are driven by and , so both must be 0: a memory read cycle (, ).. It is driven by decoder output 0, so . Hence the low address byte is .. The AND gate takes , so .So the device is selected by a memory read from address F8F8H. Data on – is read onto the data bus by an instruction that reads memory at F8F8H into the accumulator.
- (A) MVI A, F8H loads an immediate value and does not read the device.
- (B) IN F8H is an I/O read (), which disables the decoder.
- (C) OUT F8H is an I/O write.
- (D) LDA F8F8H performs a memory read from F8F8H: correct.
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