GATE EC 2016 Set 3 — Question 23

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NAT+1 / -0MediumClamping CircuitsDiode CircuitsAnalog Circuits

Analog Circuits → Diode Circuits → Clamping Circuits

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Question

The diodes D1 and D2 in the figure are ideal and the capacitors are identical. The product RC is very large compared to the time period of the ac voltage. Assuming that the diodes do not breakdown in the reverse bias, the output voltage VOV_O (in volt) at the steady state is __________
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