GATE EC 2017 Set 2 — Question 15
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Digital Circuits → Combinational Logic → Static CMOS Logic Gates
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Question
For the circuit shown in the figure, and are the inputs and is the output.
The logic implemented by the circuit is
- A.XNOR
- B.XOR
- C.NOR
- D.OR
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Correct answer
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Solution
To determine the logic implemented by the circuit, we analyze the output for different combinations of inputs and .
The expression for the output is , which is the Boolean expression for an XOR gate ().
1.When :
- The PMOS transistor (top) is ON because its gate is at logic 0.
- The NMOS transistor (bottom) is OFF because its gate is at logic 0.
- The output is connected to input through the PMOS transistor. Thus, .
- The PMOS transistor is OFF.
- The NMOS transistor is ON.
- The output is connected to the output of the inverter, which provides . Thus, .
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
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