GATE EC 2018 Set 1 — Question 42

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MCQ+2 / -0.67MediumROM, PROM, EPROM & EEPROMSemiconductor MemoriesDigital Circuits

Digital Circuits → Semiconductor Memories → ROM, PROM, EPROM & EEPROM

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Question

A 2×22 \times 2 ROM array is built with the help of diodes as shown in the circuit below. Here W0W_0 and W1W_1 are signals that select the word lines and B0B_0 and B1B_1 are signals that are output of the sense amps based on the stored data corresponding to the bit lines during the read operation.
2x2 ROM array circuit using diodes and sense amplifiers
During the read operation, the selected word line goes high and the other word line is in a high impedance state. As per the implementation shown in the circuit diagram above, what are the bits corresponding to DijD_{ij} (where i=0i = 0 or 11 and j=0j = 0 or 11) stored in the ROM?
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