GATE EC 2022 Set 1 — Question 28

The question asks to select the correct statement(s) regarding CMOS implementation of NOT gates.Option (A): Noise Margin High ($N_{MH}$) is always equal to the Noise Margin Low ($N_{ML}$), irrespective of the sizing of transistors.
In a CMOS inverter, $N_{MH}$ and $N_{ML}$ are generally not equal. They depend on the threshold voltages and the W/L ratios of the nMOSFET and pMOSFET. For a symmetric inverter (where $N_{MH} = N_{ML}$), specific sizing (W/L ratios) is required, typically when the effective transconductance parameters are equal ($\mu_n C_{ox} (W/L)_n = \mu_p C_{ox} (W/L)_p$). Therefore, $N_{MH}$ is not always equal to $N_{ML}$ irrespective of sizing. This statement is incorrect.Option (B): Dynamic power consumption during switching is zero.
Dynamic power consumption in CMOS circuits occurs during switching transitions due to the charging and discharging of load capacitances ($P_{dynamic} = C_L V_{DD}^2 f$) and also due to short-circuit current when both nMOS and pMOS transistors are momentarily ON during transitions. Since these phenomena are inherent to switching, dynamic power consumption is not zero. This statement is incorrect.Option (C): For a logical high input under steady state, the nMOSFET is in the linear regime of operation.
When the input to a CMOS NOT gate is a logical high ($V_{in} = V_{DD}$), the nMOSFET is ON and the pMOSFET is OFF. In steady state, the output voltage ($V_{out}$) will be a logical low, ideally 0 V. For the nMOSFET, $V_{GS} = V_{DD}$ and $V_{DS} = V_{out} = 0$ V. Since $V_{DS} < (V_{GS} - V_{THn})$ (assuming $V_{THn} < V_{DD}$), the nMOSFET operates in the linear (or triode) region. This statement is correct.Option (D): Mobility of electrons never influences the switching speed of the NOT gate.
The switching speed of a CMOS NOT gate is determined by how quickly the load capacitance can be charged and discharged. This charging/discharging current is provided by the nMOSFET and pMOSFET. The current drive capability of a MOSFET is directly proportional to the carrier mobility (electron mobility for nMOSFET, hole mobility for pMOSFET). Higher mobility leads to higher current drive and thus faster switching. Therefore, mobility of electrons (and holes) significantly influences the switching speed. This statement is incorrect.The final answer is $\boxed{C}$