GATE EC 2025 Set 1 — Question 35

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NAT+1 / -0MediumDAC (Weighted, R-2R)Data ConvertersDigital Circuits

Digital Circuits → Data Converters → DAC (Weighted, R-2R)

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Question

A 4-bit weighted-resistor DAC with inputs b3,b2,b1,b_3, b_2, b_1, and b0b_0 (MSB to LSB) is designed using an ideal opamp, as shown below. The switches are closed when the corresponding input bits are logic '1' and open otherwise.
When the input b3b2b1b0b_3b_2b_1b_0 changes from 11101110 to 11011101, the magnitude of the change in the output voltage VOV_O (in mV, rounded off to the nearest integer) is ________.

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