GATE EE 2014 Set 1 — Question 62
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Analog & Digital Electronics → Digital Logic Circuits → MUX, DEMUX, Decoders
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Question
An output device is interfaced with 8-bit microprocessor 8085A. The interfacing circuit is shown in figure. The interfacing circuit makes use of 3 Line to 8 Line decoder having 3 enable lines . The address of the device is
Correct answer
(B) 5000_H
Solution
To determine the address of the output device, we analyze the selection logic of the 3-to-8 line decoder:
1.Decoder Selection: The output port is connected to the decoder's output line '2'. For this output to be active, the binary input to the select lines must be .
- is the output of a NAND gate with inputs and . For , the NAND output must be high, which requires . This means at least one of or must be 0.
- is connected to . For , , indicating memory-mapped I/O (16-bit addressing).
- is connected to . For , , indicating a write operation.
- From the select lines: .
- From the enable condition: . In option (B) , and , so , which satisfies the condition.
- Assuming the remaining address bits to are 0.
- The 16-bit address is .
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