GATE EC 2014 Set 4 — Question 26
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Digital Circuits → Combinational Logic → Static CMOS Logic Gates
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Question
The output (Y) of the circuit shown in the figure is
Correct answer
(A) A + B + C
Solution
The given circuit is a CMOS logic gate.
1.NMOS Network (Pull-down): The NMOS transistors are in series with inputs , , and . The output is pulled to ground () only when , , and (which means ). Thus, the pull-down condition is .
2.PMOS Network (Pull-up): The PMOS transistors are in parallel with inputs , , and . The output is pulled to () if any of the inputs is . Thus, the pull-up condition is .
Combining these, the logic expression for the output is . This matches option (A).Continue learning with Success Tracker
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