GATE EC 2016 Set 2 — Question 28
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+1 / -0.33EasyAdders & SubtractorsCombinational LogicDigital CircuitsMUX, DEMUX, Decoders & Encoders
Digital Circuits → Combinational Logic → Adders & Subtractors
Last updated
Question
A 4:1 multiplexer is to be used for generating the output carry of a full adder. and are the bits to be added while is the input carry and is the output carry. and are to be used as the select bits with being the more significant select bit.
Which one of the following statements correctly describes the choice of signals to be connected to the inputs and so that the output is ?
Correct answer
(A) I₀=0, I₁=Cᵢₙ, I₂=Cᵢₙ and I₃=1
Solution
The output carry of a full adder is given by the Boolean expression .
Using and as select lines ():
Using and as select lines ():
- If (select ):
- If (select ):
- If (select ):
- If (select ):
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE EC question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Combinational Logic
2026 Set 1 Q20In the circuit shown in the Figure, A and B are logic inputs and Y is the logic output. Which of…2026 Set 1 Q27A binary ripple counter is designed to count to . Which of the following…2026 Set 1 Q35The negative edge triggered JK flip-flop in the Figure has J and K inputs tied to Logic High and a…2026 Set 1 Q42The address of the first location of a 256 kilo byte (KB) memory is . Choose the correct…2026 Set 1 Q45What is the complement of ?