GATE EC 2018 Set 1 — Question 57
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Digital Circuits → Combinational Logic → Boolean Algebra & Identities
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Question
The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to implement “wired logic”. Such shorted nodes will be HIGH only if the outputs of all the gates whose outputs are shorted are HIGH.
The number of distinct values of (out of the 16 possible values) that give is _______.
Correct answer
8 to 8
Solution
The circuit employs wired-AND logic at shorted nodes. Let's analyze the logic step-by-step:
1.The output of the first NOT gate is .
2.The output of the XOR gate is .
3.These two outputs are shorted, creating a wired-AND node .
4.Node and input are the inputs to an AND gate. Its output is .
5.The output of the second NOT gate is .
6. and are shorted, creating another wired-AND node .
7.Node and input are inputs to an OR gate. The final output is .
For , we must have . Since there are 4 binary inputs, and is fixed to 1, the number of distinct values for is . These values are .Continue learning with Success Tracker
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