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GATE EC 2019 Set 1 — Question 64

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NAT+2 / -0HardCS, CD & CG ConfigurationsBJT & MOSFET AmplifiersAnalog Circuits

Analog Circuits → BJT & MOSFET Amplifiers → CS, CD & CG Configurations

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Question

In the circuit shown, the threshold voltages of the pMOS (∣Vtp∣|V_{tp}|) and nMOS (VtnV_{tn}) transistors are both equal to 1 V1\text{ V}. All the transistors have the same output resistance rdsr_{ds} of 6 MΩ6\text{ M}\Omega. The other parameters are listed below:μnCox=60 μA/V2\mu_n C_{ox} = 60\text{ }\mu\text{A/V}^2; (WL)nMOS=5\left(\frac{W}{L}\right)_{nMOS} = 5
μpCox=30 μA/V2\mu_p C_{ox} = 30\text{ }\mu\text{A/V}^2; (WL)pMOS=10\left(\frac{W}{L}\right)_{pMOS} = 10μn\mu_n and μp\mu_p are the carrier mobilities, and CoxC_{ox} is the oxide capacitance per unit area. Ignoring the effect of channel length modulation and body bias, the gain of the circuit is ______ (rounded off to 1 decimal place).
CMOS amplifier circuit diagram
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