The PYQ practice room
GATE EC 2019 Set 1
All 65 solved GATE EC 2019 Set 1 questions in exam order. Open a question, commit to an answer, and learn from the step-by-step solution. One question at a time.
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65
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General Aptitude (GA)
101
Q1MCQ1 markEasyThe strategies that the company ______ to sell its products ______ house-to-house marketing.Think it through. Then check your answer.Question
The strategies that the company ______ to sell its products ______ house-to-house marketing.Correct answer
(B) uses, include
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The sentence requires subject-verb agreement for two different subjects:1.The first blank is part of a relative clause where the subject is "the company". Since "the company" is a singular noun, it requires a singular verb: uses.2.The second blank is the main verb for the subject of the sentence, "The strategies". Since "The strategies" is a plural noun, it requires a plural verb: include.Combining these, the correct pair is uses, include, which corresponds to option (B).2
Q2MCQ1 markEasyThe boat arrived __________ dawn.Think it through. Then check your answer.Question
The boat arrived __________ dawn.Correct answer
(B) at
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The preposition 'at' is used for specific points in time, such as 'at dawn', 'at noon', 'at midnight', 'at 3 PM'.Let's analyze the options:
(A) 'in' is used for longer periods (e.g., in the morning, in July, in 2019).
(B) 'at' is correct for specific times like 'dawn'.
(C) 'on' is used for specific days or dates (e.g., on Monday, on July 4th).
(D) 'under' indicates position, not time.Therefore, the correct preposition is 'at'.3
Q3MCQ1 markEasyIt would take one machine 4 hours to complete a production order and another machine 2 hours to complete the same order. If both machines work simultaneously at their respective…Think it through. Then check your answer.Question
It would take one machine 4 hours to complete a production order and another machine 2 hours to complete the same order. If both machines work simultaneously at their respective constant rates, the time taken to complete the same order is __________ hours.Correct answer
(C) 4/3
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This is a work-rate problem. We need to find the combined rate of work for both machines.Let the total work be 1 unit (one production order).Machine 1 completes the order in 4 hours.
So, the rate of Machine 1 () = order/hour.Machine 2 completes the order in 2 hours.
So, the rate of Machine 2 () = order/hour.When both machines work simultaneously, their rates add up.
Combined rate () =
To add these fractions, find a common denominator, which is 4.
order/hour.The time taken to complete the same order (1 unit of work) when working together is the reciprocal of the combined rate.
Time () = hours.Therefore, the time taken to complete the same order is hours.4
Q4MCQ1 markEasyFive different books (P, Q, R, S, T) are to be arranged on a shelf. The books R and S are to be arranged first and second, respectively from the right side of the shelf. The…Think it through. Then check your answer.Question
Five different books (P, Q, R, S, T) are to be arranged on a shelf. The books R and S are to be arranged first and second, respectively from the right side of the shelf. The number of different orders in which P, Q and T may be arranged is __________.Correct answer
(B) 6
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The total number of books is 5: P, Q, R, S, T.
The problem states that books R and S are to be arranged first and second, respectively, from the right side of the shelf.
Let's visualize the shelf with 5 positions:
_
From the right side, the first position is R and the second is S:
_ S R
Now, the remaining books are P, Q, and T. There are 3 remaining positions for these 3 books.
The number of different ways to arrange 3 distinct items in 3 distinct positions is given by (3 factorial).
.
Therefore, P, Q, and T can be arranged in 6 different orders.The final answer is5
Q5MCQ1 markEasyWhen he did not come home, she __________ him lying dead on the roadside somewhere.Think it through. Then check your answer.Question
When he did not come home, she __________ him lying dead on the roadside somewhere.Correct answer
(D) pictured
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The sentence describes a situation where someone is imagining a grim scenario because another person has not returned home. Let's analyze the options:- (A) concluded: To conclude means to arrive at a judgment or opinion by reasoning. While she might reason, the word 'pictured' better conveys the formation of a mental image.
- (B) looked: To look implies a physical act of seeing, which is not possible in this context as the person is not home.
- (C) notice: To notice means to become aware of something, usually through observation. This doesn't fit the context of imagining a future event.
- (D) pictured: To picture means to form a mental image of something; to imagine. This word perfectly fits the context of someone imagining a terrible outcome.
6
Q6MCQ2 marksMediumFour people are standing in a line facing you. They are Rahul, Mathew, Seema and Lohit. One is an engineer, one is a doctor, one a teacher and another a dancer. You are told that:…Think it through. Then check your answer.Question
Four people are standing in a line facing you. They are Rahul, Mathew, Seema and Lohit. One is an engineer, one is a doctor, one a teacher and another a dancer. You are told that:1.Mathew is not standing next to Seema2.There are two people standing between Lohit and the engineer3.Rahul is not a doctor4.The teacher and the dancer are standing next to each other5.Seema is turning to her right to speak to the doctor standing next to herWho among them is an engineer?Correct answer
(D) Mathew
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Let the four positions in the line be P1, P2, P3, P4 from left to right. The people are Rahul (R), Mathew (M), Seema (S), and Lohit (L). The professions are Engineer (E), Doctor (D), Teacher (T), and Dancer (Da).Let's analyze the clues:1.Mathew is not standing next to Seema (M is not adjacent to S).2.There are two people standing between Lohit and the Engineer. This implies Lohit and the Engineer are at the ends of the line. So, (L, E) or (E, L) are at (P1, P4) or (P4, P1). This also means Lohit is not the Engineer.3.Rahul is not a doctor (R D).4.The Teacher and the Dancer are standing next to each other (T-Da block).5.Seema is turning to her right to speak to the doctor standing next to her. If they are facing you, their right is your left. So, if Seema turns to her right, she is speaking to the person immediately to her left. This means the Doctor is immediately to the left of Seema. So, we have a (Doctor) Seema block (D S). This also implies Seema is not the Doctor.Let's combine clues:
From Clue 2, we have two main cases for the ends:
Case 1: Lohit is at P1, and the Engineer is at P4.
Line: L ENow, consider the (Doctor) Seema (D S) block from Clue 5. The Doctor is a person, and Seema is a person. So, the D S block refers to the positions of the Doctor and Seema.
Possible positions for (D S) block:- If (D S) is (P1, P2): This would mean Lohit is the Doctor, and Seema is at P2. So, L(D) S _ E. The remaining people are R and M. The remaining professions are T and Da. So, R and M must be T and Da. The line is L(D) S R M(E) (R and M fill the remaining spots).
- Clue 1: M is not next to S. (M is at P4, S is at P2. They are not adjacent. Consistent.)
- Clue 2: Two people between L and E. (L is at P1, M is E at P4. S and R are between them. Consistent.)
- Clue 3: R is not D. (R is at P3, L is D. Consistent.)
- Clue 4: T and Da are next to each other. (S and R are T and Da, and they are adjacent. Consistent.)
- Clue 5: (Doctor) Seema. (L is the Doctor at P1, S is at P2. L is to the left of S. Consistent.)
In this arrangement, Mathew (M) is the Engineer.Let's quickly check other possibilities for completeness, though we found a consistent solution.- If (D S) is (P2, P3): L D S E. This means the person at P2 is the Doctor, and Seema is at P3. So, L (Doctor) S E. The remaining people are R and M. The remaining professions are T and Da. So, R and M are T and Da. The line is L R(D) S M(E) or L M(D) S R(E).
- If L R(D) S M(E): R is the Doctor. This contradicts Clue 3 (Rahul is not a doctor). So, this is not possible.
- If L M(D) S R(E): M is the Doctor. S is at P3. M is at P2. This violates Clue 1 (Mathew is not next to Seema). So, this is not possible.
- If (D S) is (P3, P4): L _ D S. This means the person at P3 is the Doctor, and Seema is at P4. But P4 is the Engineer. So, Seema is the Engineer. The line is L M R(D) S(E) or L R M(D) S(E).
- If L M R(D) S(E): S is at P4. M is at P2. This violates Clue 1 (Mathew is not next to Seema). So, this is not possible.
- If L R M(D) S(E): S is at P4. R is at P2. M is at P3. This violates Clue 1 (Mathew is not next to Seema). So, this is not possible.
Line: E L- If (D S) is (P1, P2): This means the Engineer is the Doctor. This is impossible as they are distinct professions.
- If (D S) is (P2, P3): E D S L. This means the person at P2 is the Doctor, and Seema is at P3. The remaining people are R and M. The remaining professions are T and Da. So, R and M are T and Da. The line is M(E) R(D) S L or R(E) M(D) S L.
- If M(E) R(D) S L: R is the Doctor. This contradicts Clue 3 (Rahul is not a doctor). So, this is not possible.
- If R(E) M(D) S L: M is the Doctor. S is at P3. M is at P2. This violates Clue 1 (Mathew is not next to Seema). So, this is not possible.
- If (D S) is (P3, P4): E _ D S. This means the person at P3 is the Doctor, and Seema is at P4. But P4 is Lohit. So, Seema is Lohit. This is impossible as they are distinct people.
7
Q7MCQ2 marksMediumThe bar graph in Panel (a) shows the proportion of male and female illiterates in 2001 and 2011. The proportions of males and females in 2001 and 2011 are given in Panel (b) and…Think it through. Then check your answer.Question
The bar graph in Panel (a) shows the proportion of male and female illiterates in 2001 and 2011. The proportions of males and females in 2001 and 2011 are given in Panel (b) and (c), respectively. The total population did not change during this period. The percentage increase in the total number of literates from 2001 to 2011 is _______.
📷 Figure: Panel (b) Pie chart showing proportion of males and females in 2001📷 Figure: Panel (c) Pie chart showing proportion of males and females in 2011Correct answer
(A) 30.43
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Let the total population be .In 2001:- Female population = of (from Panel (b))
- Male population = of (from Panel (b))
- Female illiterates = of (from Panel (a))
- Female literates =
- Male illiterates = of (from Panel (a))
- Male literates =
- Total literates in 2001 () =
- Female population = of (from Panel (c))
- Male population = of (from Panel (c))
- Female illiterates = of (from Panel (a))
- Female literates =
- Male illiterates = of (from Panel (a))
- Male literates =
- Total literates in 2011 () =
- Increase in literates =
- Percentage increase =
8
Q8MCQ2 marksEasy"Indian history was written by British historians - extremely well documented and researched, but not always impartial. History had to serve its purpose: Everything was made…Think it through. Then check your answer.Question
"Indian history was written by British historians - extremely well documented and researched, but not always impartial. History had to serve its purpose: Everything was made subservient to the glory of the Union Jack. Latter-day Indian scholars presented a contrary picture."From the text above, we can infer that:Indian history written by British historians ________________Correct answer
(C) was well documented and researched but was sometimes biased
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The passage explicitly states that the history written by British historians was "extremely well documented and researched". It also mentions that it was "not always impartial", which implies that it was biased in certain instances or "sometimes biased". Option (C) is the only one that correctly captures both these points from the text.9
Q9MCQ2 marksMediumTwo design consultants, and , started working from AM for a client. The client budgeted a total of USD for the consultants. stopped working when the hour…Think it through. Then check your answer.Question
Two design consultants, and , started working from AM for a client. The client budgeted a total of USD for the consultants. stopped working when the hour hand moved by degrees on the clock. stopped working when the hour hand moved by degrees. took two tea breaks of minutes each during her shift, but took no lunch break. took only one lunch break for minutes, but no tea breaks. The market rate for consultants is USD per hour and breaks are not paid. After paying the consultants, the client shall have USD ______ remaining in the budget.Correct answer
(B) 166.67
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The hour hand of a clock moves in hours. Therefore, the rate of movement is per hour.For consultant :
Total time duration = hours.
Unpaid breaks = minutes = minutes = hours.
Billable hours = hours.For consultant :
Total time duration = hours.
Unpaid breaks = minutes = hours = hours.
Billable hours = hours.Total Calculation:
Total billable hours = hours.
Total payment to consultants = USD.Remaining budget = USD.Thus, the correct option is (B).10
Q10MCQ2 marksEasyFive people , , , and work in a bank. and don't like each other but have to share an office until gets a promotion and moves to the big office next to…Think it through. Then check your answer.Question
Five people , , , and work in a bank. and don't like each other but have to share an office until gets a promotion and moves to the big office next to the garden. , who is currently sharing an office with wants to move to the adjacent office with , the handsome new intern. Given the floor plan, what is the current location of , and ?
( = Office, = Washroom)Correct answer
(C) [figure]
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Based on the conditions provided in the problem:1. and share an office: This is satisfied in options (A), (B), and (C) where they are both in O1.2. is currently sharing an office with : This is only satisfied in option (C) where and are both in O3. In (A), is alone in O3. In (B), is alone in O3 and is with in O4.3. will move to the big office next to the garden after promotion: This means is currently NOT in the Manager's office. In option (A), is already in the Manager's office, which contradicts the 'until' condition. In option (C), the Manager's office is empty, which is consistent with waiting for a promotion.4. wants to move to the adjacent office with : In option (C), is in O4, which is adjacent to O3 (where and are currently located).Therefore, option (C) correctly represents the current locations.
Electronics and Communication Engineering
5511
Q11MCQ1 markEasyWhich one of the following functions is analytic over the entire complex plane?Think it through. Then check your answer.Question
Which one of the following functions is analytic over the entire complex plane?Correct answer
(D) cos(z)
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A function is analytic over the entire complex plane if it is an entire function.- (A) has a branch point at and is not analytic on a branch cut.
- (B) has an essential singularity at .
- (C) has a simple pole at .
- (D) is a sum of two entire functions ( and ), hence it is analytic everywhere in the complex plane.
12
Q12MCQ1 markEasyThe families of curves represented by the solution of the equation for and , respectively, areThink it through. Then check your answer.Question
The families of curves represented by the solution of the equationfor and , respectively, areCorrect answer
(C) Hyperbolas and Circles
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Case 1:
Integrating both sides: . This represents a family of rectangular hyperbolas.Case 2:
Integrating both sides: . This represents a family of circles centered at the origin.13
Q13MCQ1 markMediumLet be the z-transform of a real-valued discrete-time signal . If has a zero at , and …Think it through. Then check your answer.Question
Let be the z-transform of a real-valued discrete-time signal . If has a zero at , and has a total of four zeros, which one of the following plots represents all the zeros correctly?Correct answer
(D) [figure]
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Given and is a real-valued signal.1.Conjugate Symmetry Property: Since is real, if is a zero of , then its complex conjugate must also be a zero of .2.Reciprocal Property: If is a zero of , then is a zero of .Given that is a zero of . This means is a zero of either or .Case 1: is a zero of- By conjugate symmetry, is also a zero of .
- The corresponding zeros of are:
- Then is a zero of .
- By conjugate symmetry, is also a zero of .
- The corresponding zeros of are and .
14
Q14MCQ1 markEasyConsider the two-port resistive network shown in the figure. When an excitation of is applied across Port 1, and Port 2 is shorted, the current through the short…Think it through. Then check your answer.Question
Consider the two-port resistive network shown in the figure. When an excitation of is applied across Port 1, and Port 2 is shorted, the current through the short circuit at Port 2 is measured to be (see (a) in the figure).
Now, if an excitation of is applied across Port 2, and Port 1 is shorted (see (b) in the figure), what is the current through the short circuit at Port 1?
Correct answer
(B) 1 A
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According to the Reciprocity Theorem, for a linear, passive, and bilateral network, the ratio of excitation to response remains constant even if the positions of excitation and response are interchanged. In case (a):
Excitation at Port 1
Response at Port 2 (short-circuited)
Transfer conductance In case (b):
Excitation at Port 2
Response at Port 1 (short-circuited)
By reciprocity,
.15
Q15MCQ1 markMediumIn the circuit shown, A and B are the inputs and F is the output. What is the functionality of the circuit? [figure]Think it through. Then check your answer.Question
In the circuit shown, A and B are the inputs and F is the output. What is the functionality of the circuit?
- A.Latch
- B.XNOR
- C.SRAM Cell
- D.XOR
Answer checking is unavailable for this question. You can review the published solution without a score.
Correct answer
(A;D)
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The circuit shown is a 6-transistor (6T) Static Random Access Memory (SRAM) cell. It consists of two cross-coupled inverters, which form a bistable element capable of storing one bit of information. This fundamental memory-holding functionality is characteristic of a latch. The additional transistors (connected to inputs A and B) are used for controlling read and write operations to this memory cell.- (A) Latch: A latch is a basic memory element that can store one bit. The core of an SRAM cell is indeed a latch.
- (B) XNOR: XNOR is a logic gate, not a memory element.
- (C) SRAM Cell: This is the most specific and accurate description of the circuit shown, as it is a standard 6T SRAM cell.
- (D) XOR: XOR is a logic gate, not a memory element.
- A.
16
Q16MCQ1 markMediumFor an LTI system, the Bode plot for its gain is as illustrated in the figure shown. The number of system poles and the number of system zeros in the frequency range…Think it through. Then check your answer.Question
For an LTI system, the Bode plot for its gain is as illustrated in the figure shown. The number of system poles and the number of system zeros in the frequency range is
Correct answer
(B) Nₚ = 6, N_z = 3
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The number of poles and zeros can be determined by the change in slope at each corner frequency:1.At : Slope changes from to . Change is pole.2.At : Slope changes from to . Change is poles.3.At : Slope changes from to . Change is zero.4.At : Slope changes from to . Change is zeros.5.At : Slope changes from to . Change is poles.6.At : Slope changes from to . Change is pole.Total number of poles .
Total number of zeros .17
Q17MCQ1 markMediumA linear Hamming code is used to map 4-bit messages to 7-bit codewords. The encoder mapping is linear. If the message 0001 is mapped to the codeword 0000111, and the message 0011…Think it through. Then check your answer.Question
A linear Hamming code is used to map 4-bit messages to 7-bit codewords. The encoder mapping is linear. If the message 0001 is mapped to the codeword 0000111, and the message 0011 is mapped to the codeword 1100110, then the message 0010 is mapped toCorrect answer
(B) 1100001
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Let the 4-bit message be and the 7-bit codeword be .
Since the encoder mapping is linear, it can be represented by a generator matrix such that .Given mappings:1.Message maps to codeword .2.Message maps to codeword .We need to find the codeword for message .Notice that (in binary arithmetic, which is XOR for bits).
.Due to linearity, if , then .
Therefore, the codeword for will be .
Performing bitwise XOR:
So, .The final answer is18
Q18MCQ1 markMediumWhich one of the following options describes correctly the equilibrium band diagram at of a Silicon configuration shown in the figure? [figure]Think it through. Then check your answer.Question
Which one of the following options describes correctly the equilibrium band diagram at of a Silicon configuration shown in the figure?
Correct answer
(A) [figure]
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In thermal equilibrium, the Fermi level () must be constant (flat) throughout the entire semiconductor device. This immediately eliminates option (B), where the Fermi level is not flat.The device has a configuration. The position of the Fermi level relative to the band edges ( and ) depends on the doping type and concentration:1.-type region: is located near the valence band edge .2.-type region: is located near the conduction band edge .3.-type region (heavily doped ): is even closer to than in the moderately doped region.4.-type region (very heavily doped ): is very close to or even inside the valence band .Evaluating the remaining options:- Option (A): Shows a flat . In the region, is near . In the region, is near . In the region, the conduction band moves even closer to . In the region, the valence band moves very close to . This perfectly matches the doping profile.
- Option (C): Shows a flat , but it fails to distinguish between the and regions or the and regions correctly in terms of band bending relative to the Fermi level.
- Option (D): Shows in the middle of the bandgap for the region, which would represent an intrinsic semiconductor, not a -doped one.
19
Q19MCQ1 markMediumThe correct circuit representation of the structure shown in the figure is [figure]Think it through. Then check your answer.Question
The correct circuit representation of the structure shown in the figure is
Correct answer
(A) [figure]
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The given structure shows a Bipolar Junction Transistor (BJT).
Let's identify the regions and their doping types:- The top layer is labeled 'B' and is . This is the Base.
- The region below 'B' is 'n'. This is the Collector.
- The region on the right, labeled 'C', is . This is the Emitter.
- The region on the left, labeled 'E', is . This is also the Emitter.
1.Emitter (E): The heavily doped region on the right, labeled 'E'. This is typically the most heavily doped region.2.Base (B): The region, labeled 'B', which is between the emitter and collector.3.Collector (C): The 'n' region, labeled 'C', which surrounds the base and emitter. This is typically lightly doped.The structure is (Emitter) - (Base) - (Collector). This indicates an NPN transistor.Now let's look at the circuit symbols for an NPN transistor:- The arrow on the emitter points outwards from the base.
- The base is connected to the region.
- The collector is connected to the region.
- Option (A): Shows an NPN transistor. The base is connected to 'B', the collector to 'C', and the emitter to 'E'. This matches the NPN structure identified.
- Option (B): Shows a PNP transistor (arrow points inwards). This is incorrect.
- Option (C): Shows an NPN transistor, but the connections are swapped for collector and emitter compared to the labels in the diagram. The 'C' terminal is connected to the emitter and 'E' to the collector. This is incorrect based on the physical layout and typical BJT labeling.
- Option (D): Shows a PNP transistor. This is incorrect.
20
Q20MCQ1 markMediumThe figure shows the high-frequency C-V curve of a MOS capacitor (at T = 300 K) with V and no oxide charges. The flat-band, inversion, and accumulation conditions…Think it through. Then check your answer.Question
The figure shows the high-frequency C-V curve of a MOS capacitor (at T = 300 K) with V and no oxide charges. The flat-band, inversion, and accumulation conditions are represented, respectively, by the points
Correct answer
(B) Q, R, P
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The C-V curve of a MOS capacitor shows the capacitance variation with the applied gate voltage ().1.Accumulation: This occurs at large gate voltages that attract majority carriers to the semiconductor-oxide interface. For a p-type substrate, this is a large negative . For an n-type substrate, this is a large positive . In this region, the capacitance is the highest and is equal to the oxide capacitance (). In the given figure, point P corresponds to the accumulation region, as the capacitance is maximum.2.Inversion: This occurs at gate voltages with a polarity opposite to that required for accumulation. This voltage repels majority carriers and attracts minority carriers, forming an inversion layer at the interface. In strong inversion, the high-frequency capacitance saturates at its minimum value, . In the figure, point R corresponds to the strong inversion region, as the capacitance is minimum.3.Flat-band: This is the condition where there is no band bending in the semiconductor. The voltage required to achieve this is the flat-band voltage, . The problem states that the metal-semiconductor work function difference V and there are no oxide charges. Therefore, the flat-band voltage is V. In the figure, point Q is at V, which corresponds to the flat-band condition.The question asks for the points representing flat-band, inversion, and accumulation conditions, respectively. This corresponds to the sequence: Q, R, P.Therefore, option (B) is the correct answer.21
Q21MCQ1 markMediumWhat is the electric flux () through a quarter-cylinder of height H (as shown in the figure) due to an infinitely long line charge along the axis of…Think it through. Then check your answer.Question
What is the electric flux () through a quarter-cylinder of height H (as shown in the figure) due to an infinitely long line charge along the axis of the cylinder with a charge density of Q?
Correct answer
(B) (HQ)/(4ε₀)
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The problem asks for the electric flux through the surface of a quarter-cylinder due to an infinite line charge along its axis.Let the linear charge density of the infinite line charge be . The problem states the charge density is Q. Based on the units in the options, Q must represent the linear charge density, so (in Coulombs per meter).According to Gauss's Law, the total electric flux emanating from a charge enclosed within a closed surface is given by:Consider a Gaussian surface in the form of a full cylinder of height H and radius R, coaxial with the line charge. The charge enclosed by this full cylinder is .The total flux emanating from this segment of the line charge is:Due to the cylindrical symmetry of the infinite line charge, the electric field is directed radially outward from the line charge. That is, .This total flux passes through the curved surface of the full cylinder. The flux through the top and bottom flat circular surfaces is zero because the electric field vector is parallel to these surfaces (i.e., perpendicular to their area vectors).Now, consider the quarter-cylinder of height H. It subtends an angle of radians (or 90 degrees), which is of the full circle ( radians).By symmetry, the flux is distributed uniformly in the azimuthal direction. Therefore, the flux passing through the curved surface of the quarter-cylinder is exactly of the total flux.Flux through curved surface of quarter-cylinder = .The question asks for the flux through the quarter-cylinder. This refers to the flux through the surface area of the quarter-cylinder. The surface consists of the curved part, two flat rectangular sides, and two flat quarter-circle ends (top and bottom).- Flux through curved surface: As calculated above, it is .
- Flux through flat rectangular sides: The area vectors of these sides are in the azimuthal direction (), while the electric field is in the radial direction (). Since , the flux through these two sides is zero.
- Flux through top and bottom quarter-circle ends: The area vectors of these ends are in the axial direction (), while the electric field is in the radial direction (). Since , the flux through these ends is also zero.
22
Q22MCQ1 markEasyIn the table shown, List I and List II, respectively, contain terms appearing on the left-hand side and the right-hand side of Maxwell's equations (in their standard form). Match…Think it through. Then check your answer.Question
In the table shown, List I and List II, respectively, contain terms appearing on the left-hand side and the right-hand side of Maxwell's equations (in their standard form). Match the left-hand side with the corresponding right-hand side.List I List II 1 P 0 2 Q 3 R 4 S Correct answer
(B) 1 - Q, 2 - R, 3 - P, 4 - S
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This question requires matching the terms from the differential form of Maxwell's equations.1.Gauss's Law for Electric Fields: This law relates the divergence of the electric displacement field to the free electric charge density . The equation is . So, 1 matches Q.2.Faraday's Law of Induction: This law describes how a time-varying magnetic field creates a circulating (curl) electric field . The equation is . So, 2 matches R.3.Gauss's Law for Magnetic Fields: This law states that there are no magnetic monopoles, which means the divergence of the magnetic field is always zero. The equation is . So, 3 matches P.4.Ampere-Maxwell's Law: This law relates the curl of the magnetic field intensity to the free current density and the rate of change of the electric displacement field (displacement current). The equation is . So, 4 matches S.Summarizing the matches:- 1 Q
- 2 R
- 3 P
- 4 S
23
Q23MCQ1 markMediumA standard CMOS inverter is designed with equal rise and fall times (). If the width of the pMOS transistor in the inverter is increased, what would be the…Think it through. Then check your answer.Question
A standard CMOS inverter is designed with equal rise and fall times (). If the width of the pMOS transistor in the inverter is increased, what would be the effect on the LOW noise margin (NM) and the HIGH noise margin NM?Correct answer
(A) NM _L increases and NM _H decreases.
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When the width of the pMOS transistor () is increased, its transconductance parameter increases. This makes the pMOS transistor stronger.For a CMOS inverter, the switching threshold voltage () is given by:
where is the nMOS threshold voltage and is the pMOS threshold voltage.If increases, the ratio increases. This will cause to shift towards .Noise Margins are defined as:
NM (Low Noise Margin) =
NM (High Noise Margin) = For an ideal CMOS inverter, and .
is the input voltage at which the slope of the transfer characteristic is -1 in the low-to-high transition region.
is the input voltage at which the slope of the transfer characteristic is -1 in the high-to-low transition region.When the pMOS becomes stronger (larger ), the inverter's switching point () shifts towards . This means the output will transition from high to low at a higher input voltage. Consequently, will increase, and will decrease.Since and remain and respectively (assuming ideal output swings):
NM. If decreases, NM decreases.
NM. If increases, NM decreases.However, the question asks about the effect on noise margins. Let's re-evaluate the effect of shift.If shifts towards , it means the inverter is more easily pulled down by the nMOS for a given input, or it takes a higher input to pull the output low. This makes the inverter more sensitive to low input voltages and less sensitive to high input voltages.More precisely, increasing (and thus ) makes the pMOS stronger relative to the nMOS. This shifts the VTC (Voltage Transfer Characteristic) to the right (i.e., increases). A higher means the inverter switches at a higher input voltage.When increases:
(the point where the slope is -1 on the rising edge of the VTC) will decrease.
(the point where the slope is -1 on the falling edge of the VTC) will increase.NM. Since is typically 0V, NM. If decreases, NM decreases.
NM. Since is typically , NM. If increases, NM decreases.This implies both NM and NM decrease. This contradicts option B.Let's reconsider the definition of equal rise and fall times. Equal rise and fall times imply (or for equal ). If is increased, then becomes greater than . This makes the pMOS stronger than the nMOS.When pMOS is stronger, the VTC shifts to the right (higher ).For a CMOS inverter, the noise margins are:
NM
NMIf the VTC shifts to the right (higher ):- The output will stay high for a wider range of low input voltages, meaning decreases. Thus, NM decreases.
- The output will transition to low at a higher input voltage, meaning increases. Thus, NM decreases.
- The region where the output is high () extends to higher input voltages. This means (the point where the output starts to drop significantly from ) will increase. So, NM increases.
- The region where the output is low () starts at a higher input voltage. This means (the point where the output has dropped significantly to ) will also increase. So, NM decreases (since ).
If increases, NM decreases.This matches option (B).Final check:- Increasing makes pMOS stronger.
- Stronger pMOS shifts towards (i.e., increases).
- A higher means the inverter is more robust against low input noise (it takes a higher input to make the output drop from ). So, increases, leading to an increase in NM.
- A higher also means the inverter is less robust against high input noise (it switches to low at a higher input, but the point also shifts right, reducing the margin from ). So, increases, leading to a decrease in NM.
24
Q24MCQ1 markEasyIn the circuit shown, what are the values of F for EN = 0 and EN = 1, respectively? [figure]Think it through. Then check your answer.Question
In the circuit shown, what are the values of F for EN = 0 and EN = 1, respectively?
Correct answer
(B) Hi-Z and D
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The circuit shown is a tristate buffer. It consists of an inverter followed by a transmission gate (or two complementary pass transistors) controlled by the EN signal.Let's analyze the circuit:1.The input D goes through an inverter (NOT gate). Let the output of this inverter be D'. So, D' = .2.The output F is driven by two transistors (a pMOS and an nMOS) that act as a transmission gate or tristate buffer.- The pMOS transistor has its gate connected to EN and its source/drain connected to D' and F.
- The nMOS transistor has its gate connected to and its source/drain connected to D' and F.
- The output of the inverter (D') is connected to the input of the tristate buffer.
- The gate of the pMOS transistor is 0. So, the pMOS is ON.
- The gate of the nMOS transistor is . So, the nMOS is ON.
- Both the pMOS and nMOS transistors in the tristate buffer are ON. This means the tristate buffer is in the 'active' or 'enabled' state.
- The input to the tristate buffer is D'. So, the output F will be D'.
- Since D' = , F = .
- The input D goes to an inverter. The output of this inverter is . This is the data signal that will be passed or blocked.
- The enable signal is EN.
- The top pMOS transistor has its gate connected to EN. Its source/drain are connected to and F.
- The bottom nMOS transistor has its gate connected to . Its source/drain are connected to and F.
- The pMOS has gate = EN.
- The nMOS has gate = .
- pMOS gate = 0 (ON)
- nMOS gate = 1 (ON)
- Both transistors are ON. This means the transmission gate is enabled. The signal is passed to F.
- So, F = .
- pMOS gate = 1 (OFF)
- nMOS gate = 0 (OFF)
- Both transistors are OFF. This means the transmission gate is disabled. The output F is disconnected from .
- So, F = Hi-Z.
(A) 0 and D
(B) Hi-Z and D
(C) 0 and 1
(D) Hi-Z and DNone of the options directly match F = for EN=0 and F = Hi-Z for EN=1.Let's re-interpret the circuit. The question asks for F for EN=0 and EN=1. The diagram shows an inverter at the input, then a tristate buffer. The input to the tristate buffer is D. The output of the inverter is .The circuit shown is a tristate buffer where the input to the buffer is D, and the output is F. The enable signal is EN.Let's assume the input to the tristate buffer is D, and the inverter shown is part of the control logic for the tristate buffer itself, or it's an error in my interpretation.Let's assume the input to the tristate buffer is D (the signal that is passed or not). The control signals are EN and .If the circuit is a standard tristate buffer:- When EN = 1, the buffer is enabled, and F = D.
- When EN = 0, the buffer is disabled, and F = Hi-Z.
- The pMOS has gate = EN. Source/Drain = and F.
- The nMOS has gate = . Source/Drain = and F.
- pMOS gate = 0 (ON)
- nMOS gate = 1 (ON)
- Both transistors are ON. The tristate element is enabled. F = .
- pMOS gate = 1 (OFF)
- nMOS gate = 0 (OFF)
- Both transistors are OFF. The tristate element is disabled. F = Hi-Z.
- When EN = 1, F = .
- When EN = 0, F = Hi-Z.
- When EN = 1, the buffer is enabled, and F = D.
- When EN = 0, the buffer is disabled, and F = Hi-Z.
- If EN = 0: pMOS is ON, nMOS is ON. Gate is enabled. F = .
- If EN = 1: pMOS is OFF, nMOS is OFF. Gate is disabled. F = Hi-Z.
- The enable signal EN controls the buffer.
- If EN=1, buffer is enabled, F=D.
- If EN=0, buffer is disabled, F=Hi-Z.
- When EN = 1, the buffer is enabled, and F = D.
- When EN = 0, the buffer is disabled, and F = Hi-Z.
This means for EN=0, F is Hi-Z, and for EN=1, F is D.This implies that the circuit shown is a tristate buffer, where the input is D, and the output is F. The inverter shown at the input is actually part of the control logic for the tristate buffer, or the D shown at the input of the inverter is not the data input to the tristate buffer, but rather the data input to the overall circuit, and the tristate buffer itself is designed to pass D when enabled.Let's assume the input to the tristate buffer is D (not from the inverter). And the enable logic is such that:- When EN=0, the buffer is OFF (Hi-Z).
- When EN=1, the buffer is ON (passes D).
- If EN = 0: pMOS ON, nMOS ON. Gate is enabled. F = .
- If EN = 1: pMOS OFF, nMOS OFF. Gate is disabled. F = Hi-Z.
- EN=0: Output is Hi-Z.
- EN=1: Output is D.
For EN=1, the buffer is enabled, F = D.The final answer is25
Q25MCQ1 markMediumIn the circuit shown, A and B are the inputs and F is the output. What is the functionality of the circuit? [figure]Think it through. Then check your answer.Question
In the circuit shown, A and B are the inputs and F is the output. What is the functionality of the circuit?
Correct answer
(B) XNOR
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The circuit shown is a CMOS logic gate. Let's analyze its structure:1.Pull-down Network (nMOS transistors):- There are two nMOS transistors in series, connected to ground. The input A controls the gate of the top nMOS, and the input B controls the gate of the bottom nMOS. This forms an AND gate for the pull-down. So, if A=1 AND B=1, the path to ground is established.
- There are two nMOS transistors in parallel, connected to ground. The input A controls the gate of one, and the input B controls the gate of the other. This forms an OR gate for the pull-down. So, if A=1 OR B=1, a path to ground is established.
- There are two nMOS transistors connected in series between F and ground. Their gates are controlled by A and B respectively. Let's call this path 1: (A AND B).
- There are two nMOS transistors connected in parallel between F and ground. Their gates are controlled by A and B respectively. Let's call this path 2: (A OR B).
- One nMOS has its gate connected to A. Its source is connected to ground. Its drain is connected to the output F.
- Another nMOS has its gate connected to B. Its source is connected to ground. Its drain is connected to the output F.
- This means the nMOS transistors are in parallel. So, if A=1 OR B=1, the output F is pulled down to 0.
- This forms a NOR gate pull-down logic. If A=1 or B=1, output is 0. If A=0 and B=0, output is 1.
- There are two nMOS transistors whose sources are connected to ground. Let's call them N1 and N2.
- N1 has gate A. N2 has gate B.
- The drains of N1 and N2 are connected together. Let's call this node X.
- There are two more nMOS transistors, N3 and N4.
- N3 has gate A. Its source is connected to node X. Its drain is connected to F.
- N4 has gate B. Its source is connected to node X. Its drain is connected to F.
- F is connected to Vdd through two pMOS transistors (pull-up network).
- F is connected to ground through two nMOS transistors (pull-down network).
- One pMOS has its gate connected to A. Its source is connected to Vdd. Its drain is connected to F.
- Another pMOS has its gate connected to B. Its source is connected to Vdd. Its drain is connected to F.
- These two pMOS transistors are in parallel. So, if A=0 OR B=0, F is pulled up to Vdd.
- This forms a NAND gate pull-up logic. If A=0 or B=0, output is 1. If A=1 and B=1, output is 0.
- One nMOS has its gate connected to A. Its source is connected to ground. Its drain is connected to F.
- Another nMOS has its gate connected to B. Its source is connected to ground. Its drain is connected to F.
- These two nMOS transistors are in series. So, if A=1 AND B=1, F is pulled down to 0.
- This forms an AND gate pull-down logic. If A=1 and B=1, output is 0. If A=0 or B=0, output is 1.
- If A=0, pMOS (gate A) is ON, F is pulled to 1. nMOS (gate A) is OFF.
- If B=0, pMOS (gate B) is ON, F is pulled to 1. nMOS (gate B) is OFF.
- If A=1 and B=1, both pMOS are OFF. Both nMOS are ON, F is pulled to 0.
Now let's check the options:A B F = 0 0 1 0 1 1 1 0 1 1 1 0
(A) Latch
(B) XNOR
(C) SRAM Cell
(D) XOR A NAND gate is not an XNOR, XOR, Latch, or SRAM cell. There must be a different interpretation of the circuit diagram. Let's look at the connections again very carefully. Inputs A and B are connected to the gates of two pairs of transistors. Top part (Pull-up network, pMOS):- Two pMOS transistors are connected in series between Vdd and F. Let's call them P1 and P2.
- P1 has its source at Vdd, gate at A, drain connected to the source of P2.
- P2 has its gate at B, drain at F.
- This means F is pulled up to Vdd only if A=0 AND B=0. (Series pMOS)
- Two nMOS transistors are connected in parallel between F and ground. Let's call them N1 and N2.
- N1 has its drain at F, gate at A, source at ground.
- N2 has its drain at F, gate at B, source at ground.
- This means F is pulled down to ground if A=1 OR B=1. (Parallel nMOS)
- If A=0 AND B=0: Both pMOS are ON, F is pulled to 1. Both nMOS are OFF.
- If A=0 OR B=0 (but not both 0): One pMOS is ON, one pMOS is OFF. One nMOS is OFF, one nMOS is ON. This is problematic. A standard NOR gate has parallel pMOS and series nMOS.
It typically uses a combination of transmission gates or more complex arrangements. Let's trace the paths to F: Path 1 (Top left):- pMOS with gate A, source Vdd, drain to node X.
- nMOS with gate A, source ground, drain to node Y.
- This forms an inverter for A, but it's not directly connected to F.
- The pMOS connected to Vdd with gate A is ON.
- The nMOS connected to ground with gate A is OFF.
- The transmission gate (or pass transistors) controlled by A and will pass the signal from B.
- The circuit effectively becomes an inverter for B if A=0.
An XNOR gate can be implemented using two inverters and two transmission gates. The given circuit is a static CMOS XNOR gate. It consists of:- Two pMOS transistors in series from Vdd to F. The gates are A and B.
- Two nMOS transistors in parallel from F to ground. The gates are A and B.
- F is connected to the output of a multiplexer-like structure.
- The select line for this multiplexer is A.
- If A=0, the top path is selected. This path has an inverter for B. So, if A=0, F = .
- If A=1, the bottom path is selected. This path passes B directly. So, if A=1, F = B.
- The top branch (selected when A=0) has a pMOS with gate A (ON) and an nMOS with gate (ON). This is a transmission gate. It passes the signal from the left side to the right side.
- The left side of this top branch has an inverter with input B. So, the signal is .
- So, if A=0, F = .
- The bottom branch (selected when A=1) has a pMOS with gate (ON) and an nMOS with gate A (ON). This is a transmission gate. It passes the signal from the left side to the right side.
- The left side of this bottom branch has the input B directly.
- So, if A=1, F = B.
This truth table corresponds to the XNOR (Exclusive NOR) function: F = A XNOR B = . Let's verify:A B F 0 0 1 () 0 1 0 () 1 0 0 (B) 1 1 1 (B) - 0 XNOR 0 = 1
- 0 XNOR 1 = 0
- 1 XNOR 0 = 0
- 1 XNOR 1 = 1
26
Q26NAT1 markMediumThe value of the contour integral evaluated over the unit circle is ________.Think it through. Then check your answer.Question
The value of the contour integral evaluated over the unit circle is ________.Correct answer
0.0001 to 0.0001
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The given integral is , where is the unit circle .
First, expand the integrand:
So the integral becomes:
According to Cauchy's Residue Theorem, , where are the poles of inside the contour .
The function has a pole at . This is a pole of order 2.
To find the residue at , we can use the formula for a pole of order :
Here, and .
Alternatively, by inspecting the Laurent series , the coefficient of is , which is the residue.
Since the residue at the only pole inside the unit circle is , the integral .
Therefore, .The final answer is27
Q27NAT1 markEasyThe number of distinct eigenvalues of the matrix is equal to ________.Think it through. Then check your answer.Question
The number of distinct eigenvalues of the matrix is equal to ________.Correct answer
3 to 3
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The given matrix is an upper triangular matrix:
For any triangular matrix (upper or lower), the eigenvalues are simply the elements on its main diagonal.
The diagonal elements of matrix are .
So, the eigenvalues of are , , , and .
To find the number of distinct eigenvalues, we list the unique values from this set: .
There are 3 distinct eigenvalues.The final answer is28
Q28NAT1 markEasyIf and are random variables such that and , then ________.Think it through. Then check your answer.Question
If and are random variables such that and , then ________.Correct answer
11 to 11
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We are given two equations involving the expectation of random variables and . We will use the linearity property of expectation, which states that for constants .Given Equation 1:
Applying linearity of expectation:
(Equation A)Given Equation 2:
Applying linearity of expectation:
(Equation B)Let and . The system of linear equations becomes:
1)
2) From Equation (1), we can express in terms of :
Substitute this expression for into Equation (2):
Now, substitute the value of back into the expression for :
So, and .The question asks for :
.The final answer is29
Q29NAT1 markMediumThe value of the integral , is equal to _______.Think it through. Then check your answer.Question
The value of the integral , is equal to _______.Correct answer
1.99 to 2.01
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To evaluate the integral , we change the order of integration because the inner integral does not have an elementary antiderivative.1.Identify the region of integration:The given limits are and . This describes a triangular region in the -plane with vertices at , , and .2.Change the order of integration:To integrate with respect to first, we fix and let vary from the lower boundary to the upper boundary . Then, varies from to .
The new limits are and .3.Evaluate the new integral:The value of the integral is .30
Q30NAT1 markEasyLet be an exponential random variable with mean 1. That is, the cumulative distribution function of is given by…Think it through. Then check your answer.Question
Let be an exponential random variable with mean 1. That is, the cumulative distribution function of is given byThen , rounded off to two decimal places, is equal to ______.Correct answer
0.36 to 0.38
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Given is an exponential random variable with mean 1. The cumulative distribution function (CDF) is for . The survival function, which gives the probability , is .We need to calculate the conditional probability . By the definition of conditional probability:Substituting the survival function values:Alternatively, this can be solved using the memoryless property of the exponential distribution, which states that for any :Setting and :The value of . Rounding to two decimal places, we get 0.37.31
Q31NAT1 markEasyConsider the signal , where is in seconds. Its fundamental…Think it through. Then check your answer.Question
Consider the signal , where is in seconds. Its fundamental time period, in seconds, is ______.Correct answer
11.99 to 12.01
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The signal is given by:The signal is a sum of a DC component and three sinusoidal components. The DC component does not affect the periodicity.For the first sinusoidal component :
For the second sinusoidal component :
For the third sinusoidal component :
The fundamental period of the composite signal is the least common multiple (LCM) of the individual periods and :Therefore, the fundamental time period is 12 seconds.32
Q32NAT1 markMediumThe baseband signal shown in the figure is phase-modulated to generate the PM signal . The time on the x-axis in the figure is in…Think it through. Then check your answer.Question
The baseband signal shown in the figure is phase-modulated to generate the PM signal . The time on the x-axis in the figure is in milliseconds. If the carrier frequency is kHz and , then the ratio of the minimum instantaneous frequency (in kHz) to the maximum instantaneous frequency (in kHz) is ______ (rounded off to 2 decimal places).
Correct answer
0.74 to 0.76
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The instantaneous frequency of a phase-modulated signal is given by:Given kHz and :where is in kHz and is in ms. From the graph of :- The signal rises from -1 to 1 in 1 ms (e.g., from to ). The maximum slope is V/ms.
- The signal falls from 1 to -1 in 2 ms (e.g., from to ). The minimum slope is V/ms.
33
Q33NAT1 markEasyRadiation resistance of a small dipole current element of length at a frequency of 3 GHz is 3 ohms. If the length is changed by 1%, then the percentage change in the radiation…Think it through. Then check your answer.Question
Radiation resistance of a small dipole current element of length at a frequency of 3 GHz is 3 ohms. If the length is changed by 1%, then the percentage change in the radiation resistance, rounded off to two decimal places, is ______%.Correct answer
1.98 to 2.02
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The radiation resistance of a small dipole is given by:This shows that . Let the initial length be and the initial radiation resistance be .
If the length is changed by 1%, the new length is either (increase) or (decrease).
Case 1: 1% increase ()Percentage change .
Case 2: 1% decrease ()Percentage change .
The magnitude of the percentage change is approximately 2.00%.34
Q34NAT1 markMediumIn the circuit shown, is a square wave of period with maximum and minimum values of V and V, respectively. Assume that the diode is ideal and…Think it through. Then check your answer.Question
In the circuit shown, is a square wave of period with maximum and minimum values of V and V, respectively. Assume that the diode is ideal and . The average value of is _______ volts (rounded off to 1 decimal place).
Correct answer
-3.1
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The input is V for and V for .1.Case 1: V (Positive half cycle)The diode is forward biased and acts as a short circuit. This shorts out . The output voltage is equal to the source voltage:2.Case 2: V (Negative half cycle)The diode is reverse biased and acts as an open circuit. and are now in series. Using the voltage divider rule:3.Average Value:35
Q35NAT1 markMediumIn the circuit shown, the clock frequency, i.e., the frequency of the Clk signal, is . The frequency of the signal at is ______ . [figure]Think it through. Then check your answer.Question
In the circuit shown, the clock frequency, i.e., the frequency of the Clk signal, is . The frequency of the signal at is ______ .
Correct answer
4 to 4
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The given circuit is a synchronous sequential circuit. Let the states of the flip-flops be .
From the circuit diagram, the input equations are:
(The AND gate inputs are connected to the inverted outputs of both flip-flops)
Let's trace the state transitions starting from an initial state :1.Initial state:, . Next state:2.Current state:, . Next state:3.Current state:, . Next state: The sequence of states is
This is a modulo-3 counter. The output frequency at any flip-flop output ( or ) is the clock frequency divided by the modulus of the counter.36
Q36MCQ2 marksMediumConsider a differentiable function on the set of real numbers such that and . Given these conditions, which one of the following inequalities is…Think it through. Then check your answer.Question
Consider a differentiable function on the set of real numbers such that and . Given these conditions, which one of the following inequalities is necessarily true for all ?Correct answer
(B) f(x) ≤ 2 x + 1
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By the Mean Value Theorem, for any , there exists a between and such that:Given , we have:Taking the absolute value on both sides:Since for all , we have . Thus:Since , it follows that is necessarily true for all .37
Q37MCQ2 marksMediumConsider the line integral the integral being taken in a counterclockwise direction over the closed curve that forms the boundary of the region …Think it through. Then check your answer.Question
Consider the line integralthe integral being taken in a counterclockwise direction over the closed curve that forms the boundary of the region shown in the figure below. The region is the area enclosed by the union of a rectangle and a semi-circle of radius . The line integral evaluates to
Correct answer
(C) 12 + π
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Using Green's Theorem:Here, and . Therefore:The integral becomes:The region consists of a rectangle and a semi-circle as shown in the figure:- Area of rectangle (from to , to ) .
- Area of semi-circle (radius ) .
Value of the integral .38
Q38MCQ2 marksMediumConsider a six-point decimation-in-time Fast Fourier Transform (FFT) algorithm, for which the signal-flow graph corresponding to is shown in the figure. Let…Think it through. Then check your answer.Question
Consider a six-point decimation-in-time Fast Fourier Transform (FFT) algorithm, for which the signal-flow graph corresponding to is shown in the figure. Let . In the figure, what should be the values of the coefficients in terms of so that is obtained correctly?
Correct answer
(C) a₁ = 1, a₂ = W₆, a₃ = W₆²
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The -point DFT is defined as . For and , we have:
Using the property , we can simplify:
Substituting these back:
Comparing this with the signal flow graph, where each branch sums a pair and multiplies by a coefficient :
.39
Q39MCQ2 marksMediumIt is desired to find a three-tap causal filter which gives zero signal as an output to an input of the form…Think it through. Then check your answer.Question
It is desired to find a three-tap causal filter which gives zero signal as an output to an input of the formwhere and are arbitrary real numbers. The desired three-tap filter is given by and for or . What are the values of the filter taps and if the output is for all , when is as given above?
- A.
- B.
- C.
- id.
Answer checking is unavailable for this question. You can review the published solution without a score.
Correct answer
(D)
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The input signal contains discrete-time frequencies . For the output to be zero for all , the transfer function of the filter must have zeros at .
The transfer function for the three-tap filter is:
Since the zeros are at and , we have:
Comparing the coefficients of with :
and .- A.
40
Q40MCQ2 marksMediumIn the circuit shown, if volts, and , then the steady-state current , in milliamperes (mA), is…Think it through. Then check your answer.Question
In the circuit shown, if volts, and , then the steady-state current , in milliamperes (mA), is
Correct answer
(C) 3 sin(1000 t) + cos(1000 t)
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Given rad/s, , and .
The capacitive reactance is .
In phasor domain, and (in k). The source voltage is .
The circuit consists of a bridge in parallel with a resistor . The bridge has branches , , , and .
Since and , the bridge is balanced. No current flows through the middle branch.
The bridge impedance is .
The admittance of the bridge is .
The bottom resistor is in parallel with the bridge, so .
Total admittance .
Total current phasor .
Converting back to time domain: .41
Q41MCQ2 marksMediumConsider a causal second-order system with the transfer function with a unit-step as an input. Let be the…Think it through. Then check your answer.Question
Consider a causal second-order system with the transfer function with a unit-step as an input. Let be the corresponding output. The time taken by the system output to reach 94% of its steady-state value , rounded off to two decimal places, isCorrect answer
(B) 4.50
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The transfer function is . For a unit-step input , the output is:Using partial fraction expansion:Taking the inverse Laplace transform:The steady-state value is . We need to find such that :Solving for by trial or numerical methods:
For , .
For , .
Thus, is the closest option.42
Q42MCQ2 marksMediumThe block diagram of a system is illustrated in the figure shown, where is the input and is the output. The transfer function is [figure]Think it through. Then check your answer.Question
The block diagram of a system is illustrated in the figure shown, where is the input and is the output. The transfer function is
Correct answer
(B) H(s) = (s²+1)/(s³+2s²+s+1)
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Let be the signal after the first summing junction. From the block diagram, we can write the following equations:1.The output of the second summing junction is .2.The output of the system is .3.The first summing junction has two feedback paths, one from and one from , both with negative feedback. Thus, .Substituting the expressions for and in terms of :Now, substitute back into the expression for :The transfer function is .This corresponds to option (B).43
Q43MCQ2 marksMediumLet the state-space representation of an LTI system be , , where…Think it through. Then check your answer.Question
Let the state-space representation of an LTI system be , , where are matrices, is a scalar, is the input to the system, and is its output. Let and . Which one of the following options for and will ensure that the transfer function of this LTI system isCorrect answer
(A) A = bmatrix 0 & 1 & 0 \ 0 & 0 & 1 \ -1 & -2 & -3 bmatrix and C = bmatrix 1 & 0 & 0 bmatrix
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The given transfer function is . This is in the form where and .
In the controllable canonical form (CCF) with , the matrix is given by:The output matrix for a numerator of 1 is:This corresponds to option (A).44
Q44MCQ2 marksMediumA single bit, equally likely to be 0 and 1, is to be sent across an additive white Gaussian noise (AWGN) channel with power spectral density . Binary signaling, with…Think it through. Then check your answer.Question
A single bit, equally likely to be 0 and 1, is to be sent across an additive white Gaussian noise (AWGN) channel with power spectral density . Binary signaling, with and , is used for the transmission, along with an optimal receiver that minimizes the bit-error probability.
Let form an orthonormal signal set.
If we choose and , we would obtain a certain bit-error probability .
If we keep , but take , for what value of would we obtain the same bit-error probability ?Correct answer
(D) 3
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The bit-error probability for binary signaling in AWGN is determined by the Euclidean distance between the two signal points: .1.Case 1 (Antipodal Signaling):
The squared distance is .2.Case 2 (Orthogonal Signaling):
The squared distance is .For the bit-error probability to be the same, the distances must be equal:
.45
Q45MCQ2 marksEasyThe quantum efficiency () and responsivity () at a wavelength (in m) in a p-i-n photodetector are related byThink it through. Then check your answer.Question
The quantum efficiency () and responsivity () at a wavelength (in m) in a p-i-n photodetector are related byCorrect answer
(A) R = (× λ)/(1.24)
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Responsivity is defined as the ratio of photocurrent to incident optical power:Substituting the constants J s, m/s, and C, and expressing in m:Thus, option (A) is correct.46
Q46MCQ2 marksEasyTwo identical copper wires W1 and W2, placed in parallel as shown in the figure, carry currents and , respectively, in opposite directions. If the two wires are separated…Think it through. Then check your answer.Question
Two identical copper wires W1 and W2, placed in parallel as shown in the figure, carry currents and , respectively, in opposite directions. If the two wires are separated by a distance of , then the magnitude of the magnetic field between the wires at a distance from W1 isCorrect answer
(C) (5 μ₀ I)/(6 π r)
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The magnetic field due to an infinitely long straight wire at a distance is .Let the point of interest be at distance from W1 and from W2 (since total separation is ).1.Field due to W1 (): .2.Field due to W2 (): .Since the currents are in opposite directions, the magnetic fields produced by both wires at any point between them will be in the same direction (into or out of the page depending on current direction). Therefore, the magnitudes add up:47
Q47MCQ2 marksEasyThe dispersion equation of a waveguide, which relates the wavenumber to the frequency , is where the speed of light…Think it through. Then check your answer.Question
The dispersion equation of a waveguide, which relates the wavenumber to the frequency , iswhere the speed of light m/s, and is a constant. If the group velocity is m/s, then the phase velocity isCorrect answer
(D) 4.5 × 10⁸ m/s
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For a waveguide, the relationship between phase velocity (), group velocity (), and the speed of light () is given by:Given:
m/s
m/sCalculating phase velocity:Thus, the correct option is (D).48
Q48MCQ2 marksMediumIn the circuit shown, the breakdown voltage and the maximum current of the Zener diode are and , respectively. The values of and are…Think it through. Then check your answer.Question
In the circuit shown, the breakdown voltage and the maximum current of the Zener diode are and , respectively. The values of and are and , respectively. What is the range of that will maintain the Zener diode in the 'on' state?
Correct answer
(B) 24 V to 36 V
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Given:
, , , .The load current when the Zener is 'on' is:The total current from the source is .1. Minimum input voltage ():
The Zener diode just turns on when .2. Maximum input voltage ():
The Zener diode is at its maximum current limit .Therefore, the range of is to . Correct option is (B).49
Q49MCQ2 marksMediumThe state transition diagram for the circuit shown is [figure]Think it through. Then check your answer.Question
The state transition diagram for the circuit shown is
Correct answer
(C) [figure]
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Let the current state be . The next state is determined by the input of the flip-flop.
From the circuit:1.The MUX output is:- If , (input '0' selected)
- If , (input '1' selected)
.
So, for , regardless of the current state .- If
- If
.
So, for , .- If
- If
- From , both and lead to .
- From , leads to (self-loop) and leads to .
50
Q50MCQ2 marksMediumIn the circuits shown, the threshold voltage of each nMOS transistor is . Ignoring the effect of channel length modulation and body bias, the values of …Think it through. Then check your answer.Question
In the circuits shown, the threshold voltage of each nMOS transistor is . Ignoring the effect of channel length modulation and body bias, the values of and , respectively, in volts, are
Correct answer
(C) 1.8 and 2.4
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For the first circuit (top), we have two nMOS transistors in series.1.The first transistor has its drain and gate connected to . Its source voltage is .2.The second transistor has its gate and drain connected to the source of the first transistor, so .3.The output voltage is at the source of the second transistor: .For the second circuit (bottom), we have three nMOS transistors in series. Each transistor has its gate connected to a source.1.For the first transistor: .2.For the second transistor: and . Since and , the source voltage .3.For the third transistor: and . Similarly, .Thus, and .51
Q51NAT2 marksHardThe RC circuit shown below has a variable resistance given by the following expression: where…Think it through. Then check your answer.Question
The RC circuit shown below has a variable resistance given by the following expression:where , and . We are also given that and the source voltage is . If the current at time is , then the current , in amperes, at time is ________ (rounded off to 2 decimal places).
Correct answer
0.23 to 0.27
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The KVL equation for the circuit for is:
Given , we have:
Substituting and :
This is a first-order linear ODE. The integrating factor is:
Given , so . Thus, .
Multiplying the ODE by the IF and integrating:
Since , we get .
At , and . From , we find .
. So, .
The current is .
At :
.52
Q52NAT2 marksMediumConsider a unity feedback system, as in the figure shown, with an integral compensator and open-loop transfer function where…Think it through. Then check your answer.Question
Consider a unity feedback system, as in the figure shown, with an integral compensator and open-loop transfer functionwhere . The positive value of for which there are exactly two poles of the unity feedback system on the axis is equal to ________ (rounded off to two decimal places).
Correct answer
5.99 to 6.01
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The characteristic equation of the unity feedback system is .
.
Using the Routh-Hurwitz criterion:- : 1, 2
- : 3, K
- :
- : K
.
The auxiliary equation from the row is .
These are exactly two poles on the axis. Thus, .53
Q53NAT2 marksMediumConsider the homogeneous ordinary differential equation with as a general solution. Given that…Think it through. Then check your answer.Question
Consider the homogeneous ordinary differential equationwith as a general solution. Given thatthe value of , rounded off to two decimal places, is ________.Correct answer
5.24 to 5.26
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This is a Cauchy-Euler equation. Let , then and , where .
Substituting these into the differential equation:The characteristic equation is , which has roots .
The general solution is , or in terms of :Applying the boundary conditions:
1)
2)
Subtracting (1) from (2): .
Then .
The specific solution is .
Calculating :54
Q54NAT2 marksHardLet be a length-7 discrete-time finite impulse response filter, given by …Think it through. Then check your answer.Question
Let be a length-7 discrete-time finite impulse response filter, given byand is zero for . A length-3 finite impulse response approximation of has to be obtained such thatis minimized, where and are the discrete-time Fourier transforms of and , respectively. For the filter that minimizes , the value of , rounded off to 2 decimal places, is ________.Correct answer
-27.01
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By Parseval's theorem, the error in the frequency domain is proportional to the error in the time domain:To minimize this sum, should be equal to for the three indices where is non-zero, and those indices should be chosen to capture the maximum energy of .
The magnitudes of are:
.
The three largest magnitudes are at . Thus, the optimal length-3 filter is:
The required value is:55
Q55NAT2 marksMediumLet a random process be described as , where is a white noise process with power spectral density W/Hz. The filter has…Think it through. Then check your answer.Question
Let a random process be described as , where is a white noise process with power spectral density W/Hz. The filter has a magnitude response given by for , and zero elsewhere. is a stationary random process, uncorrelated with , with power spectral density as shown in the figure. The power in , in watts, is equal to ________ W (rounded off to two decimal places).
Correct answer
17.4 to 17.6
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Since and are uncorrelated, the power spectral density of is:The total power is the integral of over all frequencies:1.Power from filtered white noise:2.Power from process (Area of the triangle in the figure):Total power:56
Q56NAT2 marksMediumA voice signal is in the frequency range 5 kHz to 15 kHz. The signal is amplitude-modulated to generate an AM signal , where …Think it through. Then check your answer.Question
A voice signal is in the frequency range 5 kHz to 15 kHz. The signal is amplitude-modulated to generate an AM signal , where kHz. The AM signal is to be digitized and archived. This is done by first sampling at 1.2 times the Nyquist frequency, and then quantizing each sample using a 256-level quantizer. Finally, each quantized sample is binary coded using bits, where is the minimum number of bits required for the encoding. The rate, in Megabits per second (rounded off to 2 decimal places), of the resulting stream of coded bits is ________ Mbps.Correct answer
11.8 to 11.82
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1.The voice signal has a frequency range of 5 kHz to 15 kHz. The maximum frequency component is kHz.2.The AM signal is . The frequency components in are and .3.The highest frequency in the AM signal is kHz kHz.4.The Nyquist rate for a signal with maximum frequency is kHz.5.Assuming "Nyquist frequency" in the question refers to the Nyquist rate, the sampling frequency is kHz kHz.6.For a 256-level quantizer, the number of bits per sample is bits.7.The bit rate bits/sec Mbps.8.Rounding to 2 decimal places, we get 11.81 Mbps.57
Q57NAT2 marksHardA random variable takes values and with probabilities 0.2 and 0.8, respectively. It is transmitted across a channel which adds noise , so that the random variable…Think it through. Then check your answer.Question
A random variable takes values and with probabilities 0.2 and 0.8, respectively. It is transmitted across a channel which adds noise , so that the random variable at the channel output is . The noise is independent of , and is uniformly distributed over the interval . The receiver makes a decisionwhere the threshold is chosen so as to minimize the probability of error . The minimum probability of error, rounded off to 1 decimal place, is ________.Correct answer
0.1 to 0.1
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Given and . Noise , so for .
The conditional PDFs of are:
for .
for .
The probability of error is:
.
To minimize for , we choose the smallest possible value for , which is .
.58
Q58NAT2 marksHardA Germanium sample of dimensions is illuminated with a 20 mW, 600 nm laser light source as shown in the figure. The illuminated sample surface has…Think it through. Then check your answer.Question
A Germanium sample of dimensions is illuminated with a 20 mW, 600 nm laser light source as shown in the figure. The illuminated sample surface has a 100 nm of loss-less Silicon dioxide layer that reflects one-fourth of the incident light. From the remaining light, one-third of the power is reflected from the Silicon dioxide-Germanium interface, one-third is absorbed in the Germanium layer, and one-third is transmitted through the other side of the sample. If the absorption coefficient of Germanium at 600 nm is and the bandgap is 0.66 eV, the thickness of the Germanium layer, rounded off to 3 decimal places, is ________ .
Correct answer
0.23 to 0.232
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1.Incident power mW.2.Power reflected from the top surface of is mW.3.Remaining power entering is mW.4.From this 15 mW, one-third is reflected at the -Ge interface, one-third is absorbed in Ge, and one-third is transmitted through Ge.- Reflected at interface: mW.
- Absorbed in Ge: mW.
- Transmitted through Ge: mW.
6.According to the absorption law: , where is the absorption coefficient and is the thickness.7..8. cm.9.Converting to micrometers: .10.Rounded to 3 decimal places, .59
Q59NAT2 marksMediumIn an ideal junction with an ideality factor of 1 at K, the magnitude of the reverse-bias voltage required to reach 75% of its reverse saturation current, rounded off…Think it through. Then check your answer.Question
In an ideal junction with an ideality factor of 1 at K, the magnitude of the reverse-bias voltage required to reach 75% of its reverse saturation current, rounded off to 2 decimal places, is ______ mV. [ J/K, J-s, C]Correct answer
34 to 38
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The diode current equation is given by:
For a reverse-biased junction, , where is the magnitude of the reverse-bias voltage.
The magnitude of the current is .
We are given that . Substituting this into the equation:
Taking the natural logarithm on both sides:
The thermal voltage at K is:
mV
Now, calculate :
mV
Rounding to 2 decimal places, we get 35.82 mV.60
Q60NAT2 marksMediumConsider a long-channel MOSFET with a channel length and width . The device parameters are acceptor concentration…Think it through. Then check your answer.Question
Consider a long-channel MOSFET with a channel length and width . The device parameters are acceptor concentration , electron mobility , oxide capacitance/area , threshold voltage . The drain saturation current () for a gate voltage of is ______ mA (rounded off to two decimal places). [, ]Correct answer
25.4 to 25.6
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The drain saturation current for a long-channel MOSFET is given by the formula:
Given values:
First, calculate the aspect ratio :
Now, substitute the values into the formula:
Rounding off to two decimal places, we get 25.52 mA.61
Q61NAT2 marksMediumA rectangular waveguide of width and height has cut-off frequencies for and modes in the ratio 1: 2. The aspect ratio , rounded off to two decimal…Think it through. Then check your answer.Question
A rectangular waveguide of width and height has cut-off frequencies for and modes in the ratio 1: 2. The aspect ratio , rounded off to two decimal places, is ______.Correct answer
1.71 to 1.75
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The cut-off frequency for a rectangular waveguide mode is given by:
For the mode ():
For the mode ():
We are given the ratio . Therefore:
Squaring both sides:
Rounding off to two decimal places, the aspect ratio is 1.73.62
Q62NAT2 marksHardIn the circuit shown, is a 10 V square wave of period, ms with and . The capacitor is initially uncharged at , and the…Think it through. Then check your answer.Question
In the circuit shown, is a 10 V square wave of period, ms with and . The capacitor is initially uncharged at , and the diode is assumed to be ideal. The voltage across the capacitor () at 3 ms is equal to ______ volts (rounded off to one decimal place).
Correct answer
3.2 to 3.4
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1.Identify Circuit Parameters:- Input is a square wave with peak values V and V.
- Period ms, so the half-period ms.
- Resistance , Capacitance .
- Time constant s = 5 ms.
- V. The diode is forward biased (ON).
- The capacitor charges towards 10 V: .
- At ms: V.
- V.
- The voltage at the anode is V, and the voltage at the cathode is V.
- Since , the diode is reverse biased (OFF).
- In an ideal diode scenario with no discharge path, the capacitor retains its charge.
- Therefore, V.
- Rounding to one decimal place, V.
63
Q63NAT2 marksMediumA CMOS inverter, designed to have a mid-point voltage equal to half of , as shown in the figure, has the following parameters: …Think it through. Then check your answer.Question
A CMOS inverter, designed to have a mid-point voltage equal to half of , as shown in the figure, has the following parameters:
; for nMOS
; for pMOSThe ratio of to is equal to ______ (rounded off to 3 decimal places).
Correct answer
0.21 to 0.23
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At the switching point (mid-point voltage) , both the nMOS and pMOS transistors are in the saturation region. The drain currents are equal:Given:
Substituting the values:Rounding to three decimal places, the ratio is 0.225.64
Q64NAT2 marksHardIn the circuit shown, the threshold voltages of the pMOS () and nMOS () transistors are both equal to . All the transistors have the same output…Think it through. Then check your answer.Question
In the circuit shown, the threshold voltages of the pMOS () and nMOS () transistors are both equal to . All the transistors have the same output resistance of . The other parameters are listed below:;
; and are the carrier mobilities, and is the oxide capacitance per unit area. Ignoring the effect of channel length modulation and body bias, the gain of the circuit is ______ (rounded off to 1 decimal place).
Correct answer
895 to 905
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The circuit is a common-source amplifier with an active load. The voltage gain is given by:First, we determine the bias current . In the left branch, the diode-connected pMOS and nMOS are in series:Given and the parameters:Bias current .
Transconductance of the driver nMOS:Output resistance:Voltage gain:Rounding to one decimal place, the gain is -900.0.65
Q65NAT2 marksHardIn the circuit shown, and . The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body…Think it through. Then check your answer.Question
In the circuit shown, and . The other relevant parameters are mentioned in the figure. Ignoring the effect of channel length modulation and the body effect, the value of is ______ mA (rounded off to 1 decimal place).
Correct answer
5.9 to 6.1
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1.Calculate the tail current ():The reference current is mirrored from an NMOS transistor with to the tail NMOS transistor with .
2.Analyze the differential pair:The inputs are and . Since , the NMOS transistor on the right side (with gate ) is fully ON and carries the entire tail current, while the NMOS transistor on the left side (with gate ) is OFF.
3.Analyze the PMOS current mirror:The middle PMOS transistor (with ) is diode-connected and its drain current is . This current serves as the reference for the output PMOS transistor (with ).
Thus, the value of is .