GATE EC 2022 Set 1 — Question 18
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+1 / -0.33MediumI-V & TransconductanceMOS Capacitor & MOSFETElectronic DevicesStatic CMOS Logic GatesCombinational LogicDigital Circuits
Digital Circuits → Combinational Logic → I-V & Transconductance
Last updated
Question
Consider the CMOS circuit shown in the figure (substrates are connected to their respective sources). The gate width () to gate length () ratios of the transistors are as shown. Both the transistors have the same gate oxide capacitance per unit area. For the pMOSFET, the threshold voltage is and the mobility of holes is . For the nMOSFET, the threshold voltage is and the mobility of electrons is . The steady state output voltage is ________.
Correct answer
(C) less than 2 V
Solution
For the pMOSFET: , . Overdrive voltage .
For the nMOSFET: , . Overdrive voltage .
Both transistors are ON. The current capability is proportional to .
For pMOS: .
For nMOS: .
Since , the nMOSFET is 'stronger' than the pMOSFET. In a steady state where , the output voltage will be pulled closer to the nMOS source (ground) than the pMOS source ().
If , both transistors would be in the linear region with the same and overdrive. Since , would be greater than at . To balance the currents, must decrease to reduce and increase . Thus, .
For the nMOSFET: , . Overdrive voltage .
Both transistors are ON. The current capability is proportional to .
For pMOS: .
For nMOS: .
Since , the nMOSFET is 'stronger' than the pMOSFET. In a steady state where , the output voltage will be pulled closer to the nMOS source (ground) than the pMOS source ().
If , both transistors would be in the linear region with the same and overdrive. Since , would be greater than at . To balance the currents, must decrease to reduce and increase . Thus, .
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE EC question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Combinational Logic
2026 Set 1 Q14Consider carrier transport in a Zener diode in the breakdown region. Which is the dominant…2026 Set 1 Q18Consider the circuit shown in the Figure with and . Assume…2026 Set 1 Q20In the circuit shown in the Figure, A and B are logic inputs and Y is the logic output. Which of…2026 Set 1 Q25Consider a p-n junction diode when it is forward biased with 2 V. Which of the following is/are the…2026 Set 1 Q27A binary ripple counter is designed to count to . Which of the following…