GATE EC 2022 Set 1 — Question 43
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+2 / -0.67MediumRipple & Synchronous CountersSequential LogicDigital CircuitsSR, D, JK & T Flip-Flops
Digital Circuits → Sequential Logic → Ripple & Synchronous Counters
Last updated
Question
For the circuit shown, the clock frequency is and the duty cycle is 25%. For the signal at the Q output of the Flip-Flop, _______.
Correct answer
(A) frequency is f₀/4 and duty cycle is 50%
Solution
Read the figure. The counter's LSB drives both and ; the MSB is not connected. With , the JK flip-flop acts as a T flip-flop with .Counter LSB. In a 2-bit binary counter the LSB toggles on every clock edge, so at successive edges Flip-flop output. toggles only on edges where , i.e. on every second clock edge:
So stays high for 2 clock periods and low for 2 clock periods. Its period is , giving frequency with a 50% duty cycle. The 25% duty cycle of the clock does not matter, because the flip-flop changes state only on clock edges.
| Edge | 1 | 2 | 3 | 4 | 5 |
|---|---|---|---|---|---|
| LSB before edge | 0 | 1 | 0 | 1 | 0 |
| after edge | 0 | 1 | 1 | 0 | 0 |
- (B) a 25% duty cycle would need high for only one clock period in four.
- (C), (D): the frequency is not or .
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE EC question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Sequential Logic
2026 Set 1 Q20In the circuit shown in the Figure, A and B are logic inputs and Y is the logic output. Which of…2026 Set 1 Q27A binary ripple counter is designed to count to . Which of the following…2026 Set 1 Q35The negative edge triggered JK flip-flop in the Figure has J and K inputs tied to Logic High and a…2026 Set 1 Q42The address of the first location of a 256 kilo byte (KB) memory is . Choose the correct…2026 Set 1 Q45What is the complement of ?