GATE CS 2018 Set 1 — Question 19
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+1 / -0.33MediumInterrupt-Driven I/OI/O OrganizationComputer Organization & ArchitectureInterrupts & TrapsOS Structure & System CallsOperating System
Computer Organization & Architecture → I/O Organization → Interrupt-Driven I/O
Last updated
Question
The following are some events that occur after a device controller issues an interrupt while process is under execution. (P) The processor pushes the process status of onto the control stack.
(Q) The processor finishes the execution of the current instruction.
(R) The processor executes the interrupt service routine.
(S) The processor pops the process status of from the control stack.
(T) The processor loads the new PC value based on the interrupt.Which one of the following is the correct order in which the events above occur?
(Q) The processor finishes the execution of the current instruction.
(R) The processor executes the interrupt service routine.
(S) The processor pops the process status of from the control stack.
(T) The processor loads the new PC value based on the interrupt.Which one of the following is the correct order in which the events above occur?
Correct answer
(A) QPTRS
Solution
The standard sequence for interrupt handling is:
1.Finish the current instruction (Q).
2.Save the state/status of the current process (P).
3.Load the address of the Interrupt Service Routine (ISR) into the Program Counter (T).
4.Execute the ISR (R).
5.Restore the state/status of the process (S).
Thus, the correct order is QPTRS.Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on I/O Organization
2026 Set 1 Q14Match each addressing mode in List I with a data element or an element of a data structure (in…2026 Set 1 Q15Consider a processor P whose instruction set architecture is the load-store architecture. The…2026 Set 1 Q16Which one of the following dependencies among the register operands of different instructions can…2026 Set 2 Q18Consider the following two statements about interrupt handling mechanisms in a CPU. S1: In…2026 Set 2 Q23Which one of the following CPU scheduling algorithms cannot be preemptive?