GATE CS 2026 Set 1 — Question 15

MCQ+1 / -0.33EasyInstruction FormatsInstructions & Addressing ModesComputer Organization & ArchitectureRISC vs CISCInstruction Types

Computer Organization & Architecture → Instructions & Addressing Modes → Instruction Formats

Last updated 5 September 2026

Question

Consider a processor P whose instruction set architecture is the load-store architecture. The instruction format is such that the first operand of any instruction is the destination operand. Which one of the following sequences of instructions corresponds to the high-level language statement Z = X + Y ? Note: X, Y, and Z are memory operands. R0, R1, and R2 are registers.

Correct answer (D) LOAD R0, X LOAD R1, Y ADD R2, R0, R1 STORE Z, R2 Solution In a load-store architecture, arithmetic operations (like ADD) can only be performed on values present in registers. Memory operands cannot be used directly in ALU instructions. 1. LOAD R0, X : Load the value from memory location X into register R0. 2. LOAD R1, Y : Load the value from memory location Y into register R1. 3. ADD R2, R0, R1 : Add the values in R0 and R1, storing the result in register R2. 4. STORE Z, R2 : Store the value from register R2 into memory location Z. Option (A) uses memory operands directly in ADD. Option (B) uses a memory operand (Y) and destination (Z) in ADD. Option (C) uses memory operands (X, Y) in ADD. Option (D) correctly follows the load-store constraint. Turn this into a strength. Explore AI-powered practice and doubt support with Success Tracker.

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Correct answer (D) LOAD R0, X LOAD R1, Y ADD R2, R0, R1 STORE Z, R2 Solution In a load-store architecture, arithmetic operations (like ADD) can only be performed on values present in registers. Memory operands cannot be used directly in ALU instructions. 1. LOAD R0, X : Load the value from memory location X into register R0. 2. LOAD R1, Y : Load the value from memory location Y into register R1. 3. ADD R2, R0, R1 : Add the values in R0 and R1, storing the result in register R2. 4. STORE Z, R2 : Store the value from register R2 into memory location Z. Option (A) uses memory operands directly in ADD. Option (B) uses a memory operand (Y) and destination (Z) in ADD. Option (C) uses memory operands (X, Y) in ADD. Option (D) correctly follows the load-store constraint.

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