GATE CS 2026 Set 1 — Question 14
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MCQ+1 / -0.33EasyAddressing ModesInstructions & Addressing ModesComputer Organization & Architecture
Computer Organization & Architecture → Instructions & Addressing Modes → Addressing Modes
Last updated
Question
Match each addressing mode in List I with a data element or an element of a data structure (in a high-level language) in List II:
| List I | List II |
|---|---|
| P. Immediate | 1. Element of an array |
| Q. Indirect | 2. Pointer |
| R. Base with index | 3. Element of a record |
| S. Base with offset/displacement | 4. Constant |
Correct answer
(B) P–4, Q–2, R–1, S–3
Solution
P. Immediate: The operand is part of the instruction itself, typically used for constants. (Matches 4)
Q. Indirect: The instruction specifies a memory location that contains the address of the operand, typically used for pointers. (Matches 2)
R. Base with index: The effective address is calculated by adding a base register and an index register, typically used for accessing elements of an array. (Matches 1)
S. Base with offset/displacement: The effective address is the sum of a base register and a constant offset, typically used for accessing fields (elements) of a record/structure. (Matches 3)Therefore, the correct matching is P-4, Q-2, R-1, S-3.
Q. Indirect: The instruction specifies a memory location that contains the address of the operand, typically used for pointers. (Matches 2)
R. Base with index: The effective address is calculated by adding a base register and an index register, typically used for accessing elements of an array. (Matches 1)
S. Base with offset/displacement: The effective address is the sum of a base register and a constant offset, typically used for accessing fields (elements) of a record/structure. (Matches 3)Therefore, the correct matching is P-4, Q-2, R-1, S-3.
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Instructions & Addressing Modes
2026 Set 1 Q15Consider a processor P whose instruction set architecture is the load-store architecture. The…2026 Set 1 Q16Which one of the following dependencies among the register operands of different instructions can…2026 Set 2 Q18Consider the following two statements about interrupt handling mechanisms in a CPU. S1: In…2026 Set 1 Q38The size of the physical address space of a processor is bytes. The capacity of a cache…2026 Set 2 Q44Consider a processor that has 16 general purpose registers and it uses 2-byte instruction format…