GATE CS 2024 Set 1 — Question 30

MSQ+1 / -0MediumData ForwardingInstruction PipeliningComputer Organization & Architecture

Computer Organization & Architecture → Instruction Pipelining → Data Forwarding

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Question

Consider a 5-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?
A.
In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction
B.
In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction
C.
Forwarding cannot prevent all pipeline stalls
D.
Forwarding does not require any extra hardware to retrieve the data from the pipeline stages

Correct answer

(A) In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction; (B) In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction; (C) Forwarding cannot prevent all pipeline stalls

Solution

The correct statements are (A), (B), and (C).
(A) Correct: Forwarding (or bypassing) is a technique where the result of an instruction is passed directly from the stage where it is generated (source stage, e.g., output of ALU in EX or memory data in MEM) to the stage where it is needed by a subsequent instruction (destination stage, e.g., input of ALU in EX), without waiting for the result to be written back to the register file.
(B) Correct: In a standard 5-stage pipeline, data can be forwarded from the end of the MEM stage (the MEM/WB pipeline register) to the beginning of the EX stage. This path is used, for example, when a Load instruction is followed by a dependent instruction. Although a 1-cycle stall is typically required (Load-Use hazard), after the stall, the data is forwarded from the Load's MEM/WB stage to the dependent instruction's EX stage.
(C) Correct: Forwarding cannot eliminate all stalls. Specifically, a Load-Use hazard occurs when an instruction attempts to use data in the EX stage that is being loaded from memory by the immediately preceding instruction. Since the data is not available until the end of the MEM stage, it cannot be forwarded to the start of the EX stage of the very next cycle. A stall (bubble) is required.
(D) Incorrect: Forwarding requires extra hardware, including multiplexers at the ALU inputs to select between register values and forwarded values, as well as control logic to detect dependencies and control the multiplexers.

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