GATE CS 2024 Set 1 — Question 53
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.MSQ+2 / -0MediumWrite-Through vs Write-BackMemory Hierarchy & CacheComputer Organization & ArchitectureCache Replacement PoliciesSet-Associative Cache
Computer Organization & Architecture → Memory Hierarchy & Cache → Cache Replacement Policies
Last updated
Question
Consider two set-associative cache memory architectures: WBC, which uses the write back policy, and WTC, which uses the write through policy. Both of them use the LRU (Least Recently Used) block replacement policy. The cache memory is connected to the main memory. Which of the following statements is/are TRUE?
Correct answer
(B) A read miss in WTC never triggers a write back operation of a cache block to main memory; (C) A write hit in WBC can modify the value of the dirty bit of a cache block
Solution
Step-by-step analysis of the statements:
1.Statement (A): In a Write-Back Cache (WBC), a read miss requires fetching a new block from main memory. If the cache set is full, a block must be evicted based on the LRU policy. If the evicted block is 'dirty' (modified in cache but not in main memory), it must be written back to main memory. Therefore, a read miss can evict a dirty block. Statement (A) is FALSE.
2.Statement (B): In a Write-Through Cache (WTC), every write operation updates both the cache and the main memory simultaneously. Consequently, no block in the cache is ever 'dirty' relative to main memory. When a read miss occurs and a block is evicted, there is no need to write it back. Thus, a read miss in WTC never triggers a write-back. Statement (B) is TRUE.
3.Statement (C): In WBC, a 'dirty bit' is associated with each cache block to track modifications. When a block is first loaded from memory, its dirty bit is . Upon the first write hit to that block, the dirty bit is changed (modified) to . Since the statement says it 'can modify', it is correct. Statement (C) is TRUE.
4.Statement (D): As established for WTC, there are no dirty blocks. Therefore, there is no 'victim' block that needs to be written back to main memory during a miss (read or write). The missed block is simply fetched and loaded. Statement (D) is FALSE.
Conclusion: Statements (B) and (C) are correct.Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on Memory Hierarchy & Cache
2026 Set 1 Q14Match each addressing mode in List I with a data element or an element of a data structure (in…2026 Set 1 Q15Consider a processor P whose instruction set architecture is the load-store architecture. The…2026 Set 1 Q16Which one of the following dependencies among the register operands of different instructions can…2026 Set 2 Q18Consider the following two statements about interrupt handling mechanisms in a CPU. S1: In…2026 Set 1 Q38The size of the physical address space of a processor is bytes. The capacity of a cache…