GATE CS 2015 Set 1 — Question 22

MCQ+1 / -0.33MediumInstruction FormatsInstructions & Addressing ModesComputer Organization & Architecture

Computer Organization & Architecture → Instructions & Addressing Modes → Instruction Formats

Last updated 5 September 2026

Question

For computers based on three-address instruction formats, each address field can be used to specify which of the following: (S1) A memory operand (S2) A processor register (S3) An implied accumulator register

Correct answer (A) Either S1 or S2 Solution In a three-address instruction format (e.g., ADD dest, src1, src2), each address field explicitly specifies an operand location. 1. (S1) A memory operand : In many architectures (like CISC), address fields can point to memory locations. 2. (S2) A processor register : In RISC architectures, address fields typically specify registers. 3. (S3) An implied accumulator register : By definition, an "implied" operand is not explicitly specified in an address field; it is inferred from the opcode itself (common in 0-address or 1-address architectures). Therefore, an address field cannot be used to specify an implied register. Thus, only S1 and S2 are correct. Turn this into a strength. Explore AI-powered practice and doubt support with Success Tracker.

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Correct answer (A) Either S1 or S2 Solution In a three-address instruction format (e.g., ADD dest, src1, src2), each address field explicitly specifies an operand location. 1. (S1) A memory operand : In many architectures (like CISC), address fields can point to memory locations. 2. (S2) A processor register : In RISC architectures, address fields typically specify registers. 3. (S3) An implied accumulator register : By definition, an "implied" operand is not explicitly specified in an address field; it is inferred from the opcode itself (common in 0-address or 1-address architectures). Therefore, an address field cannot be used to specify an implied register. Thus, only S1 and S2 are correct.

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