GATE CS 2025 Set 1 — Question 27

MSQ+1 / -0MediumDatapath & Register FileALU & DatapathComputer Organization & Architecture

Computer Organization & Architecture → ALU & Datapath → Datapath & Register File

Last updated 5 September 2026

Question

A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

Correct answer (A) The data path can implement arithmetic operations involving two registers.; (B) The data path can implement arithmetic operations involving one register and one immediate value.; (C) The data path can implement arithmetic operations involving two immediate values. Solution Based on the provided data path diagram: Mux_A selects between register RA and a 32-bit immediate value . Mux_B selects between register RB and a 32-bit immediate value . The outputs of both multiplexers are the inputs to the ALU . This configuration allows the ALU to perform operations on the following combinations of inputs: 1. Two registers: By selecting RA from Mux_A and RB from Mux_B. (Option A is correct) 2. One register and one immediate value: By selecting RA from Mux_A and the immediate value from Mux_B, or vice versa. (Option B is correct) 3. Two immediate values: By selecting the immediate value inputs from both Mux_A and Mux_B. (Option C is correct) Option D is incorrect because it uses the word "only", which contradicts the fact that operations involving two registers or two immediate values are also possible. Thus, the correct options are A, B, and C. Turn this into a strength. Explore AI-powered practice and doubt support with Success Tracker.

Review answer and solution without JavaScript

Interactive answer checking needs JavaScript. The published solution is available below.

Correct answer (A) The data path can implement arithmetic operations involving two registers.; (B) The data path can implement arithmetic operations involving one register and one immediate value.; (C) The data path can implement arithmetic operations involving two immediate values. Solution Based on the provided data path diagram: Mux_A selects between register RA and a 32-bit immediate value . Mux_B selects between register RB and a 32-bit immediate value . The outputs of both multiplexers are the inputs to the ALU . This configuration allows the ALU to perform operations on the following combinations of inputs: 1. Two registers: By selecting RA from Mux_A and RB from Mux_B. (Option A is correct) 2. One register and one immediate value: By selecting RA from Mux_A and the immediate value from Mux_B, or vice versa. (Option B is correct) 3. Two immediate values: By selecting the immediate value inputs from both Mux_A and Mux_B. (Option C is correct) Option D is incorrect because it uses the word "only", which contradicts the fact that operations involving two registers or two immediate values are also possible. Thus, the correct options are A, B, and C.

Continue learning with Success Tracker

Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.

AI-powered practice· Unlimited practice on eligible plans

PYQs with solutions: Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
Practice that adapts: Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
AI doubt support: Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.

Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.

This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.