GATE CS 2017 Set 1 — Question 49

NAT+2 / -0MediumAddressing ModesInstructions & Addressing ModesComputer Organization & Architecture

Computer Organization & Architecture → Instructions & Addressing Modes → Addressing Modes

Last updated 5 September 2026

Question

Consider a RISC machine where each instruction is exactly 4 bytes long. Conditional and unconditional branch instructions use PC-relative addressing mode with Offset specified in bytes to the target location of the branch instruction. Further the Offset is always with respect to the address of the next instruction in the program sequence. Consider the following instruction sequence Instr. No. Instruction i : add R2, R3, R4 i+1 : sub R5, R6, R7 i+2 : cmp R1, R9, R10 i+3 : beq R1, Offset If the target of the branch instruction is i, then the decimal value of the Offset is_______.

i+3

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i+3

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