GATE CS 2020 Set 1 — Question 13

MCQ+1 / -0.33EasyProgrammed I/O (Polling)I/O OrganizationComputer Organization & ArchitectureInterrupt-Driven I/ODMA (Operation & Types)

Computer Organization & Architecture → I/O Organization → DMA (Operation & Types)

Last updated 5 September 2026

Question

Consider the following statements. I. Daisy chaining is used to assign priorities in attending interrupts. II. When a device raises a vectored interrupt, the CPU does polling to identify the source of interrupt. III. In polling, the CPU periodically checks the status bits to know if any device needs its attention. IV. During DMA, both the CPU and DMA controller can be bus masters at the same time. Which of the above statements is/are TRUE?

Correct answer (C) I and III only Solution Let's analyze each statement: I. TRUE : Daisy chaining is a hardware method where devices are connected in a serial manner. The device closest to the CPU has the highest priority. It is indeed used to assign priorities for interrupts. II. FALSE : In a vectored interrupt, the interrupting device provides the interrupt vector (address) directly to the CPU. The CPU does not need to poll devices to identify the source; that is characteristic of non-vectored interrupts. III. TRUE : Polling is a software protocol where the CPU periodically checks (polls) the status registers of I/O devices to determine if they need service. IV. FALSE : The system bus can have only one master at a time. When the DMA controller becomes the bus master to transfer data, the CPU must relinquish control of the bus (bus grant). They cannot both drive the bus simultaneously. Therefore, statements I and III are true. Turn this into a strength. Explore AI-powered practice and doubt support with Success Tracker.

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Correct answer (C) I and III only Solution Let's analyze each statement: I. TRUE : Daisy chaining is a hardware method where devices are connected in a serial manner. The device closest to the CPU has the highest priority. It is indeed used to assign priorities for interrupts. II. FALSE : In a vectored interrupt, the interrupting device provides the interrupt vector (address) directly to the CPU. The CPU does not need to poll devices to identify the source; that is characteristic of non-vectored interrupts. III. TRUE : Polling is a software protocol where the CPU periodically checks (polls) the status registers of I/O devices to determine if they need service. IV. FALSE : The system bus can have only one master at a time. When the DMA controller becomes the bus master to transfer data, the CPU must relinquish control of the bus (bus grant). They cannot both drive the bus simultaneously. Therefore, statements I and III are true.

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