GATE CS 2021 Set 1 — Question 65

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NAT+2 / -0HardInstruction FormatsInstructions & Addressing ModesComputer Organization & ArchitectureAddressing Modes

Computer Organization & Architecture → Instructions & Addressing Modes → Addressing Modes

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Question

Consider the following instruction sequence where registers R1, R2 and R3 are general purpose and MEMORY[X] denotes the content at the memory location X.
InstructionSemanticsInstruction Size (bytes)
MOV R1, (5000)R1 \leftarrow MEMORY[5000]4
MOV R2, (R3)R2 \leftarrow MEMORY[R3]4
ADD R2, R1R2 \leftarrow R1+R22
MOV (R3), R2MEMORY[R3] \leftarrow R24
INC R3R3 \leftarrow R3+12
DEC R1R1 \leftarrow R1-12
BNZ 1004Branch if not zero to the given absolute address2
HALTStop1
Assume that the content of the memory location 5000 is 10, and the content of the register R3 is 3000. The content of each of the memory locations from 3000 to 3010 is 50. The instruction sequence starts from the memory location 1000. All the numbers are in decimal format. Assume that the memory is byte addressable.
After the execution of the program, the content of memory location 3010 is __________.
Your answer

Enter a number. Decimals, negative values and scientific notation are accepted.

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