GATE CS 2018 Set 1 — Question 63
Go beyond PYQs with Success TrackerAI-powered personalised practice and doubt support. Unlimited practice on eligible plans; AI usage limits apply.NAT+2 / -0MediumDisk Scheduling AlgorithmsI/O OrganizationComputer Organization & ArchitectureDisk Structure & Access Time
Computer Organization & Architecture → I/O Organization → Disk Scheduling Algorithms
Last updated
Question
Consider a storage disk with 4 platters (numbered as 0, 1, 2 and 3), 200 cylinders (numbered as 0, 1, … , 199), and 256 sectors per track (numbered as 0, 1, … , 255). The following 6 disk requests of the form [sector number, cylinder number, platter number] are received by the disk controller at the same time:
Currently the head is positioned at sector number 100 of cylinder 80, and is moving towards higher cylinder numbers. The average power dissipation in moving the head over 100 cylinders is 20 milliwatts and for reversing the direction of the head movement once is 15 milliwatts. Power dissipation associated with rotational latency and switching of head between different platters is negligible.The total power consumption in milliwatts to satisfy all of the above disk requests using the Shortest Seek Time First disk scheduling algorithm is _______.
Currently the head is positioned at sector number 100 of cylinder 80, and is moving towards higher cylinder numbers. The average power dissipation in moving the head over 100 cylinders is 20 milliwatts and for reversing the direction of the head movement once is 15 milliwatts. Power dissipation associated with rotational latency and switching of head between different platters is negligible.The total power consumption in milliwatts to satisfy all of the above disk requests using the Shortest Seek Time First disk scheduling algorithm is _______.
Correct answer
85 to 85
Solution
The Shortest Seek Time First (SSTF) algorithm selects the request with the minimum seek time (shortest distance) from the current head position.Given:
- Current Head Position: Cylinder 80
- Current Direction: Increasing (towards higher cylinders)
- Requests (Cylinders):
- Power Cost (Movement): 20 mW per 100 cylinders mW/cylinder
- Power Cost (Reversal): 15 mW per reversal
1.Current: 80. Available: .
- Closest is 86 ().
- Move: . Direction: Increasing (Same as initial). No reversal.
- Distance: 6.
- Closest is 72 ().
- Move: . Direction: Decreasing. Reversal #1.
- Distance: 14.
- Distances: , , , .
- Closest is 116.
- Move: . Direction: Increasing. Reversal #2.
- Distance: 44.
- Closest is 134 ().
- Move: . Direction: Increasing. No reversal.
- Distance: 18.
- Closest is 20 ().
- Move: . Direction: Decreasing. Reversal #3.
- Distance: 114.
- Closest is 16 ().
- Move: . Direction: Decreasing. No reversal.
- Distance: 4.
- Total Seek Distance = cylinders.
- Total Reversals = 3.
- Movement Power = .
- Reversal Power = .
- Total Power = .
Continue learning with Success Tracker
A step still unclear? Work through it with support
Use Success Tracker to ask about the reasoning, then try another GATE CS question to check your understanding.
AI-powered practice· Unlimited practice on eligible plans
- PYQs with solutions
- Attempt available previous-year questions, then compare your reasoning with the worked solution. Coverage varies by stream.
- Practice that adapts
- Choose a topic, work on weaker areas and bookmark questions to revisit. Your attempts feed your progress tracking.
- AI doubt support
- Ask follow-up questions about a step or concept while practising, instead of stopping at the final answer.
Unlimited practice is available on eligible plans. Free practice and AI usage have limits; check the current plan allowances before choosing.
This page stays readable without an account. AI responses can be wrong; check them against the solution and source material.
More questions on I/O Organization
2026 Set 1 Q14Match each addressing mode in List I with a data element or an element of a data structure (in…2026 Set 1 Q15Consider a processor P whose instruction set architecture is the load-store architecture. The…2026 Set 1 Q16Which one of the following dependencies among the register operands of different instructions can…2026 Set 2 Q18Consider the following two statements about interrupt handling mechanisms in a CPU. S1: In…2026 Set 1 Q38The size of the physical address space of a processor is bytes. The capacity of a cache…