60 solved GATE EC questions on Electronic Devices, drawn from 9 exam years and grouped by year. Every question shows the official answer and a step-by-step solution.
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Determine the operating region of each device before writing its current-voltage relationship. These selected foundations connect semiconductor physics, diode characteristics, BJT modes, and MOSFET regions. The original exercises use ideal device models for learning, not fabrication guidance.
Our study notes and original examples support the PYQs below; they are not official exam questions or a replacement for the current syllabus.
In an intrinsic semiconductor, electron and hole concentrations are equal at ni. Doping with donors (n-type) increases electron concentration; doping with acceptors (p-type) increases hole concentration. The mass-action law np = ni² applies in thermal equilibrium, not under injection.
Check yourself: Are you applying the mass-action law under equilibrium conditions?
Under forward bias, the junction barrier decreases and current increases exponentially: I = Is(exp(V/(nVT)) − 1). Under reverse bias, current is approximately −Is until breakdown. The depletion width increases with reverse bias. The built-in potential depends on doping concentrations and temperature.
Check yourself: Is the diode forward biased, reverse biased, or in breakdown?
An NPN BJT is in active mode when the base-emitter junction is forward biased and the base-collector junction is reverse biased. In active mode, Ic ≈ βIb. In saturation, both junctions are forward biased and Vce,sat is small. Cutoff has both junctions off. Check voltages at all three terminals.
Check yourself: Which junctions are forward biased and which are reverse biased?
An enhancement NMOS turns on when Vgs > Vth. In the triode (linear) region, Vds < Vgs − Vth and Id = μnCox(W/L)[(Vgs − Vth)Vds − Vds²/2]. In saturation, Vds ≥ Vgs − Vth and Id = μnCox(W/L)(Vgs − Vth)²/2 without channel-length modulation. The threshold voltage is a device parameter, not a circuit variable.
Check yourself: Is Vds above or below (Vgs − Vth) for this bias point?
Junction capacitance depends on depletion width and varies with bias voltage. Gate capacitance in a MOSFET is approximately CoxWL in strong inversion. Switching speed depends on how quickly these capacitances charge and discharge through circuit resistances. Small-signal capacitance models apply near a specific bias point.
Check yourself: Are capacitance values evaluated at the correct operating point?
Original teaching example · not a PYQ
Original mini-example: an enhancement NMOS has Vth = 1 V and μnCox(W/L) = 2 mA/V². With Vgs = 3 V and Vds = 1 V, neglecting channel-length modulation, find Id and the operating region.
Triode region; Id = 3 mA.
An NPN BJT has β = 100 and is biased with Ib = 20 μA. The collector circuit limits Ic to 1.5 mA. What is the operating region, and what is Ic?
Saturation; Ic = 1.5 mA.
Active mode would give Ic = βIb = 100 × 0.02 = 2 mA, but the circuit limits it to 1.5 mA. Since Ic < βIb, the BJT must be in saturation. The actual Ic is the circuit-limited 1.5 mA.
Supplemental reading, not an official GATE reading list or an endorsement of these notes.
Free supplemental lectures and notes covering semiconductors, PN junctions, BJTs, and MOSFETs with worked examples and problem sets.
This page shows 60 recent questions from the released archive, newest first. For older questions and complete papers, browse all GATE EC papers. Questions can carry more than one subject tag; counts are not marks weightage.
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